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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/111822] [12/13/14 Regression] during RTL pass:
 lr_shrinkage ICE: in operator[], at vec.h:910 with -O2 -m32
 -flive-range-shrinkage -fno-dce -fnon-call-exceptions since
 r12-5301-g045206450386bc
Date: Fri, 08 Mar 2024 09:58:47 +0000
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X-Bugzilla-Product: gcc
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X-Bugzilla-Version: 14.0
X-Bugzilla-Keywords: EH, ice-on-valid-code, wrong-code
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111822

--- Comment #9 from Uro=C5=A1 Bizjak <ubizjak at gmail dot com> ---
The offending insn is emitted in general_scalar_chain::convert_op due to
preloading, but I have no idea how EH should be adjusted.  There is another
instance in timode_scalar_chain::convert_op.

emit_insn_before (gen_rtx_SET (gen_rtx_SUBREG (vmode, tmp, 0),
                               gen_gpr_to_xmm_move_src (vmode, *op)),
                  insn);=