[Bug target/111822] [12/13/14 Regression] during RTL pass: lr_shrinkage ICE: in operator[], at vec.h:910 with -O2 -m32 -flive-range-shrinkage -fno-dce -fnon-call-exceptions since r12-5301-g045206450386bc

["rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111822

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |wrong-code
          Component|rtl-optimization            |target

--- Comment #8 from Richard Biener <rguenth at gcc dot gnu.org> ---
I think it's split1 doing wrong.  We end up with

;; basic block 3, loop depth 0, count 118111600 (estimated locally, freq
1.0000), maybe hot
;;  prev block 2, next block 4, flags: (NEW, HOT_PARTITION, RTL, MODIFIED)
;;  pred:       2 [always]  count:118111600 (estimated locally, freq 1.0000)
(FALLTHRU)
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u-1(6){ }u-1(7){ }u-1(16){ }u-1(19){ }}
;; lr  in
;; lr  use
;; lr  def
;; live  in
;; live  gen
;; live  kill
(note 124 10 126 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
(jump_insn 126 124 127 3 (set (pc)
        (label_ref 125)) -1
     (nil)
 -> 125)
;;  succ:       6 [always]  count:118111600 (estimated locally, freq 1.0000)
;; lr  out
;; live  out

(barrier 127 126 84)
;; basic block 4, loop depth 0, count 0 (precise, freq 0.0000), probably never
executed
;;  prev block 3, next block 5, flags: (REACHABLE, HOT_PARTITION, RTL,
MODIFIED)
;;  pred:
;; bb 4 artificial_defs: { d-1(0){ }d-1(1){ }}
;; bb 4 artificial_uses: { u-1(6){ }u-1(7){ }u-1(16){ }u-1(19){ }}
;; lr  in        6 [bp] 7 [sp] 16 [argp] 19 [frame]
;; lr  use       6 [bp] 7 [sp] 16 [argp] 19 [frame]
;; lr  def       0 [ax] 1 [dx] 114 115
;; live  in      6 [bp] 7 [sp] 16 [argp] 19 [frame]
;; live  gen     0 [ax] 1 [dx] 114 115
;; live  kill
(code_label/s 84 127 86 4 13 (nil) [1 uses])
(note 86 84 93 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
(insn 93 86 85 4 (set (reg:SI 115)
        (reg:SI 0 ax)) "t.ii":22:42 -1
     (expr_list:REG_DEAD (reg:SI 0 ax)

so block 4 is unreachable.  split1 does

   102: r122:DI#0=vec_concat([r98:SI],0)
    10: r102:DI#0=r122:DI#0
-      REG_EH_REGION 0xd
   124: NOTE_INSN_BASIC_BLOCK 3

that looks spurious, so possibly some other pass leaves around the dead EH.
Earlier this was

   10: r102:DI=[r98:SI]
      REG_EH_REGION 0xd
      ; pc falls through to BB 5

and STV2 changes this like

-   10: r102:DI=[r98:SI]
+  102: r122:DI#0=vec_concat([r98:SI],0)
+   10: r102:DI#0=r122:DI#0
       REG_EH_REGION 0xd
       ; pc falls through to BB 5

failing to move EH (or refuse the lowering).

Thus a target issue, even wrong-code I think as we now fail to catch
a trap by the [r98:SI] load.