From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 718CE3858C52; Tue, 31 Oct 2023 14:07:07 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 718CE3858C52 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1698761227; bh=oVRfnvrCnpQf5YRxp1aXAkjjXGlJYyo55pAvScwwTW4=; h=From:To:Subject:Date:In-Reply-To:References:From; b=a4KlvQ5MHj2xztLv+EaPNy+I/QyC7V6cmqBgOBf5VNMFOc+LLsqbM3LpOmaAGtT3J 44GLbx3kDOzYOnhRCXaLZEDEh1Cxg9CKxmIGskS4PdHMx8HqY3aVNaRB0vr2f32zPg M782OPyMTXHdRyJjcAqHv/z/g88gliLVkZO2ll/s= From: "pan2.li at intel dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/111970] [14 regression] SLP for non-IFN gathers result in RISC-V test failure on gather since r14-4745-gbeab5b95c58145 Date: Tue, 31 Oct 2023 14:07:07 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: tree-optimization X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: pan2.li at intel dot com X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: rguenth at gcc dot gnu.org X-Bugzilla-Target-Milestone: 14.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111970 --- Comment #7 from Li Pan --- Seems no luck when --param vect-epilogues-nomask=3D0. I will have a try wit= h the newest upstream for this issue if everything look OK, and keep you posted. ../__RISC-V_INSTALL___RV64/bin/riscv64-unknown-elf-gcc -march=3Drv64imafdcv -mabi=3Dlp64d \ -ftree-vectorize -O3 --param riscv-autovec-preference=3Dfixed-vlmax \ --param riscv-autovec-lmul=3Ddynamic --param vect-epilogues-nomask=3D0 \ -ffast-math -lm gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-1= 2.c \ -o test.elf ../build-qemu/qemu-riscv64 -cpu rv64,v=3Dtrue,vlen=3D128,elen=3D64,vext_spe= c=3Dv1.0 test.elf assertion "dest_int32_t_int8_t[i * 2] =3D=3D (src_int32_t_int8_t [index_int32_t_int8_t[i * 2]] + 1)" failed: \ file "gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-= 12.c", line 45, function: main ../__RISC-V_INSTALL___RV64/bin/riscv64-unknown-elf-gcc --version riscv64-unknown-elf-gcc (GCC) 14.0.0 20231019 (experimental) Copyright (C) 2023 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.=