[Bug target/112109] New: Missing riscv vectorized strcmp (and other) expanders

[Bug target/112109] New: Missing riscv vectorized strcmp (and other) expanders

[rdapp at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112109

            Bug ID: 112109
           Summary: Missing riscv vectorized strcmp (and other) expanders
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rdapp at gcc dot gnu.org
                CC: juzhe.zhong at rivai dot ai, kito at gcc dot gnu.org,
                    law at gcc dot gnu.org
  Target Milestone: ---
            Target: riscv

We miss several vector expanders for string routines like strlen, strcmp.  This
is a reminder PR for them.

[Bug target/112109] Missing riscv vectorized strcmp (and other) expanders

[kito at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112109

--- Comment #1 from Kito Cheng <kito at gcc dot gnu.org> ---
Just note:

I would like to introduce `-mstringop-strategy=`, `-mmemcpy-strategy=` and
-mmemset-strategy=` option to control the behavior like x86.

the possible option list from my mind is:

- auto: current status, use scalar or vector
- libcall: always fallback to lib call
- scalar: Only scalar
- vector: Only vector

I guess we may need few more option to control some detail, but it could add it
to --param later.

[Bug target/112109] Missing riscv vectorized strcmp (and other) expanders

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112109

--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Robin Dapp <rdapp@gcc.gnu.org>:

https://gcc.gnu.org/g:2664964b2f695e947faea4c29dbddd3615cc4b0b

commit r14-6340-g2664964b2f695e947faea4c29dbddd3615cc4b0b
Author: Robin Dapp <rdapp@ventanamicro.com>
Date:   Fri Dec 1 09:57:15 2023 +0100

    RISC-V: Add vectorized strlen.

    This patch implements a vectorized strlen by re-using and slightly
    adjusting the rawmemchr implementation.  Rawmemchr returns the address
    of the needle while strlen returns the difference between needle address
    and start address.

    As before, strlen expansion is guarded by -minline-strlen.

    While testing with -minline-strlen I encountered a vsetvl problem in
    memcpy-chk.c where we didn't insert a vsetvl at the proper spot (after
    a setjmp).  This needs to be fixed separately and I figured I'd post
    this patch as-is.

    gcc/ChangeLog:

            PR target/112109

            * config/riscv/riscv-protos.h (expand_rawmemchr): Add strlen
            parameter.
            * config/riscv/riscv-string.cc (riscv_expand_strlen): Call
            rawmemchr.
            (expand_rawmemchr): Add strlen handling.
            * config/riscv/riscv.md: Add TARGET_VECTOR to strlen expander.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/autovec/builtin/strlen-run.c: New test.
            * gcc.target/riscv/rvv/autovec/builtin/strlen.c: New test.

[Bug target/112109] Missing riscv vectorized strcmp (and other) expanders

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112109

--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Robin Dapp <rdapp@gcc.gnu.org>:

https://gcc.gnu.org/g:d468718c9a097aeb8794fb1a2df6db2c1064d7f7

commit r14-6341-gd468718c9a097aeb8794fb1a2df6db2c1064d7f7
Author: Robin Dapp <rdapp@ventanamicro.com>
Date:   Fri Dec 1 10:07:23 2023 +0100

    RISC-V: Add vectorized strcmp and strncmp.

    This patch adds vectorized strcmp and strncmp implementations and
    tests.  Similar to strlen, expansion is still guarded by
    -minline-str(n)cmp.

    gcc/ChangeLog:

            PR target/112109

            * config/riscv/riscv-protos.h (expand_strcmp): Declare.
            * config/riscv/riscv-string.cc (riscv_expand_strcmp): Add
            strategy handling and delegation to scalar and vector expanders.
            (expand_strcmp): Vectorized implementation.
            * config/riscv/riscv.md: Add TARGET_VECTOR to strcmp and strncmp
            expander.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c: New test.
            * gcc.target/riscv/rvv/autovec/builtin/strcmp.c: New test.
            * gcc.target/riscv/rvv/autovec/builtin/strncmp-run.c: New test.
            * gcc.target/riscv/rvv/autovec/builtin/strncmp.c: New test.

[Bug target/112109] Missing riscv vectorized strcmp (and other) expanders

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112109

--- Comment #4 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jeff Law <law@gcc.gnu.org>:

https://gcc.gnu.org/g:df15eb15b5f820321c81efc75f0af13ff8c0dd5b

commit r15-439-gdf15eb15b5f820321c81efc75f0af13ff8c0dd5b
Author: Sergei Lewis <slewis@rivosinc.com>
Date:   Mon May 13 17:32:24 2024 -0600

    [PATCH v2 1/3] RISC-V: movmem for RISCV with V extension

    This patchset permits generation of inlined vectorised code for movmem,
    setmem and cmpmem, if and only if the operation size is
    at least one and at most eight vector registers' worth of data.

    Further vectorisation rapidly becomes debatable due to code size concerns;
    however, for these simple cases we do have an unambiguous performance win
    without sacrificing too much code size compared to a libc call.

    Changes in v2:

    * run clang-format over the code in addition to the
      contrib/check_GNU_style.sh that was used for v1

    * remove string.h include and refer to __builtin_* memory functions
      in multilib tests

    * respect stringop_strategy (don't vectorise if it doesn't include VECTOR)

    * use an integer constraint for movmem length parameter

    * use TARGET_MAX_LMUL unless riscv-autovec-lmul=dynamic
      to ensure we respect the user's wishes if they request specific lmul

    * add new unit tests to check that riscv-autovec-lmul is respected

    * PR target/112109 added to changelog for patch 1/3 as requested

    Sergei Lewis (3):
      RISC-V: movmem for RISCV with V extension
      RISC-V: setmem for RISCV with V extension
      RISC-V: cmpmem for RISCV with V extension

    gcc/ChangeLog

            * config/riscv/riscv.md (movmem<mode>): Use
riscv_vector::expand_block_move,
            if and only if we know the entire operation can be performed using
one vector
            load followed by one vector store

    gcc/testsuite/ChangeLog

            PR target/112109
            * gcc.target/riscv/rvv/base/movmem-1.c: New test