[Bug target/112276] [14 Regression] wrong code with -O2 -msse4.2 since r14-4964-g7eed861e8ca3f5

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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112276

--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:f5d33d0c790a00cb5240a966dd99df9961bf57a0

commit r14-5025-gf5d33d0c790a00cb5240a966dd99df9961bf57a0
Author: liuhongt <hongtao.liu@intel.com>
Date:   Mon Oct 30 14:05:25 2023 +0800

    Fix wrong code due to incorrect define_split

    -(define_split
    -  [(set (match_operand:V2HI 0 "register_operand")
    -        (eq:V2HI
    -          (eq:V2HI
    -            (us_minus:V2HI
    -              (match_operand:V2HI 1 "register_operand")
    -              (match_operand:V2HI 2 "register_operand"))
    -            (match_operand:V2HI 3 "const0_operand"))
    -          (match_operand:V2HI 4 "const0_operand")))]
    -  "TARGET_SSE4_1"
    -  [(set (match_dup 0)
    -        (umin:V2HI (match_dup 1) (match_dup 2)))
    -   (set (match_dup 0)
    -        (eq:V2HI (match_dup 0) (match_dup 2)))])

    the splitter is wrong when op1 == op2.(the original pattern returns 0,
after split, it returns 1)
    So remove the splitter.

    Also extend another define_split to define_insn_and_split to handle
    below pattern

    494(set (reg:V4QI 112)
    495    (unspec:V4QI [
    496            (subreg:V4QI (reg:V2HF 111 [ bf ]) 0)
    497            (subreg:V4QI (reg:V2HF 110 [ af ]) 0)
    498            (subreg:V4QI (eq:V2HI (eq:V2HI (reg:V2HI 105)
    499                        (const_vector:V2HI [
    500                                (const_int 0 [0]) repeated x2
    501                            ]))
    502                    (const_vector:V2HI [
    503                            (const_int 0 [0]) repeated x2
    504                        ])) 0)
    505        ] UNSPEC_BLENDV))

    define_split doesn't work since pass_combine assume it produces at
    most 2 insns after split, but here it produces 3 since we need to move
    const0_rtx (V2HImode) to reg. The move insn can be eliminated later.

    gcc/ChangeLog:

            PR target/112276
            * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change
            define_split to define_insn_and_split to handle
            immediate_operand for comparison.
            (*mmx_pblendvb_v8qi_2): Ditto.
            (*mmx_pblendvb_<mode>_1): Ditto.
            (*mmx_pblendvb_v4qi_2): Ditto.
            (<code><mode>3): Remove define_split after it.
            (<code>v8qi3): Ditto.
            (<code><mode>3): Ditto.
            (<ode>v2hi3): Ditto.

    gcc/testsuite/ChangeLog:

            * g++.target/i386/part-vect-vcondhf.C: Adjust testcase.
            * gcc.target/i386/pr112276.c: New test.