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From: "saurabh.jha at arm dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112337] arm: ICE in arm_effective_regno when compiling
 for MVE
Date: Tue, 07 Nov 2023 16:11:34 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112337

--- Comment #5 from Saurabh Jha <saurabh.jha at arm dot com> ---
Hey,

I did some digging into it. The ICE is happening on this assert:

gcc_assert (REG_P (op))

Here the op->code is MEM while it was expecting a REG. For the test program
above, the function arm_effective_regno is called some number of times and =
that
assert passes before it fails and cause ICE.

Could it be that the additional conditions that are causing it to use lra
causing it to fail? I am still continuing to investigate here.

Regards,
Saurabh=