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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112337] arm: ICE in arm_effective_regno when compiling
 for MVE
Date: Fri, 10 Nov 2023 16:47:46 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112337

--- Comment #9 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vladimir Makarov <vmakarov@gcc.gnu.or=
g>:

https://gcc.gnu.org/g:df66fa08578a28b3acc8bdb6257b68c245a6a0fa

commit r14-5333-gdf66fa08578a28b3acc8bdb6257b68c245a6a0fa
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Fri Nov 10 11:14:46 2023 -0500

    [IRA]: Check autoinc and memory address after temporary equivalence
substitution

    My previous RA patches to take register equivalence into account do
    temporary register equivalence substitution to find out that the
    equivalence can be consumed by insns.  The insn with the substitution is
    checked on validity using target-depended code.  This code expects that
    autoinc operations work on register but this register can be substituted
    by equivalent memory.  The patch fixes this problem.  The patch also ad=
ds
    checking that the substitution can be consumed in memory address too.

    gcc/ChangeLog:

            PR target/112337
            * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function.
            (equiv_can_be_consumed_p): Use it.

    gcc/testsuite/ChangeLog:

            PR target/112337
            * gcc.target/arm/pr112337.c: New.=