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From: "vmakarov at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112337] arm: ICE in arm_effective_regno when compiling
 for MVE
Date: Wed, 08 Nov 2023 12:41:08 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112337

Vladimir Makarov <vmakarov at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |vmakarov at gcc dot gnu.org

--- Comment #7 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
(In reply to Alex Coplan from comment #6)
> Confirmed. Here's a slightly cleaned up reproducer that doesn't warn:
>=20
> #pragma GCC arm "arm_mve_types.h"
> int32x4_t h(void *p) { return __builtin_mve_vldrwq_sv4si(p); }
> void g(int32x4_t);
> void f(int, int, int, short, int *p) {
>   int *bias =3D p;
>   for (;;) {
>     int32x4_t d =3D h(bias);
>     bias +=3D 4;
>     g(d);
>   }
> }
>=20
> ICEs with -O2 -march=3Darmv8.1-m.main+mve -mfloat-abi=3Dhard on the trunk.

Looking at the dump, I can guess INC/DEC operand is not a reg after IRA
temporary transformation.  It can be fixed in arm.cc by checking that the
operand is reg instead of using the assert but it could be wrong because the
documentation says the operand should be a reg.  Also such solution would n=
ot
work for possible problem on other targets.

Could you provide me preprocessed test file. I'll try to find a solution as
soon as possible.=