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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112387] RISC-V: failed to SLP INT64 gather load
Date: Fri, 15 Dec 2023 00:32:24 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112387

--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <panli@gcc.gnu.org>:

https://gcc.gnu.org/g:4bfafea6922dffea145d1aa1d5f5fa4814e66173

commit r14-6572-g4bfafea6922dffea145d1aa1d5f5fa4814e66173
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Fri Dec 15 06:24:32 2023 +0800

    RISC-V: Tweak generic vector COST model

    Notice current generic vector cost model make PR112387 failed to vector=
ize.

    Adapt it same as ARM SVE generic vector cost model which can fix it.

    Committed as it is obvious fix.

            PR target/112387

    gcc/ChangeLog:

            * config/riscv/riscv.cc: Adapt generic cost model same ARM SVE.

    gcc/testsuite/ChangeLog:

            * gcc.dg/vect/costmodel/riscv/rvv/pr112387.c: Moved to...
            * gcc.dg/vect/costmodel/riscv/rvv/pr112387-1.c: ...here.
            * gcc.dg/vect/costmodel/riscv/rvv/pr112387-2.c: New test.=