From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 879953856DE2; Mon, 6 Nov 2023 11:00:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 879953856DE2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1699268435; bh=dyRvtteX5L/lFRCOLiQJK78LDUj/hiFgk6ddP5YIW7Q=; h=From:To:Subject:Date:From; b=w1DGGrpbqJfIvX8Grq/Fvgj1j/xXtgY4XOhXgVZpi3mDjFct9QUCHmHZxE8wxBrYO unpAdLAUewAxN80E95wXfgoDyhE7uOFTlTysQOImbEDZK00CoV/EoAQilzfF6g8qFj SENzsdzs8LxJz7SCcMJzHnOVaYnBoxj6GwkO0BPQ= From: "tschwinge at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/112405] New: GCN: "gcc.dg/vect/vect-simd-clone-20.c:22:1: error: conversion of register to a different size in 'view_convert_expr'" Date: Mon, 06 Nov 2023 11:00:34 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: ice-on-valid-code, testsuite-fail X-Bugzilla-Severity: normal X-Bugzilla-Who: tschwinge at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status keywords bug_severity priority component assigned_to reporter cc target_milestone cf_gcctarget Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112405 Bug ID: 112405 Summary: GCN: "gcc.dg/vect/vect-simd-clone-20.c:22:1: error: conversion of register to a different size in 'view_convert_expr'" Product: gcc Version: 14.0 Status: UNCONFIRMED Keywords: ice-on-valid-code, testsuite-fail Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: tschwinge at gcc dot gnu.org CC: ams at gcc dot gnu.org, avieira at gcc dot gnu.org, jules at gcc dot gnu.org Target Milestone: --- Target: GCN The test case 'gcc.dg/vect/vect-simd-clone-20.c' added in recent commit r14-5113-gaed00696a01ac065e9ed327434ec29d1cf50179e "vect: allow using inbra= nch simdclones for masked loops" ICEs for GCN target (tested '-march=3Dgfx90a'): [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-simd-clone-20.c: In function 'masked': [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-simd-clone-20.c:22:1: error: conversion of register to a different size in 'view_convert_expr' VIEW_CONVERT_EXPR(loop_mask_1); _23 =3D VIEW_CONVERT_EXPR(loop_mask_1); during GIMPLE pass: vect dump file: ./vect-simd-clone-20.c.176t.vect [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-simd-clone-20.c:22:1: internal compiler error: verify_gimple failed 0x1022708 verify_gimple_in_cfg(function*, bool, bool) [...]/source-gcc/gcc/tree-cfg.cc:5646 0xe6edd7 execute_function_todo [...]/source-gcc/gcc/passes.cc:2088 0xe6f6e5 execute_todo [...]/source-gcc/gcc/passes.cc:2142=