From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id A1D2F3858408; Mon, 18 Mar 2024 00:22:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A1D2F3858408 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1710721335; bh=0Et8K20HQu5Kra2gN1AceaNoyf3Iw3tpTJfuBJVinOc=; h=From:To:Subject:Date:In-Reply-To:References:From; b=yUq2fGLC7E9QG2JTTdt5j/SBFYjYaUnODvdBSa6616/7+BWAUCZCn8Z46f3IGnb2T trzO94pgdXi2BLr0rXGim4uA/LE72/BrFrxDvwkpE75fnqExy06QLxbuj8HFESkrw7 cv0xXRzd34+5pfD1jY8x2+E0+IlFeNMOyYjbPPrs= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/112415] [14 regression] Python 3.11 miscompiled on HPPA with new RTL fold mem offset pass, since r14-4664-g04c9cf5c786b94 Date: Mon, 18 Mar 2024 00:22:11 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 14.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112415 --- Comment #53 from GCC Commits --- The master branch has been updated by John David Anglin : https://gcc.gnu.org/g:f0fda1aff0b752e4182c009c5526b9306bd35f7c commit r14-9511-gf0fda1aff0b752e4182c009c5526b9306bd35f7c Author: John David Anglin Date: Mon Mar 18 00:19:36 2024 +0000 hppa: Improve handling of REG+D addresses when generating PA 2.0 code In looking at PR 112415, it became clear that improvements could be made in the handling of loads and stores using REG+D addresses. A change in 2002 conflated two issues: 1) We can't generate insns with 14-bit displacements before reload completes when generating PA 1.x code since floating-point loads and stores only support 5-bit offsets in PA 1.x. 2) The GNU ELF 32-bit linker lacks relocation support for PA 2.0 floating point instructions with 14-bit displacements. These relocations affect instructions with symbolic references. The result of the change was to block creation of PA 2.0 instructions with 14-bit REG_D displacements for SImode, DImode, SFmode and DFmode on the GNU linux target before reload. This was unnecessary as these instructions don't need relocation. This change revises the INT14_OK_STRICT define to allow creation of instructions with 14-bit REG+D addresses before reload when generating PA 2.0 code. 2024-03-17 John David Anglin gcc/ChangeLog: PR rtl-optimization/112415 * config/pa/pa.cc (pa_emit_move_sequence): Revise condition for symbolic memory operands. (pa_legitimate_address_p): Revise LO_SUM condition. * config/pa/pa.h (INT14_OK_STRICT): Revise define. Move comment about GNU linker to predicates.md. * config/pa/predicates.md (floating_point_store_memory_operand): Revise condition for symbolic memory operands. Update comment.=