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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c Date: Tue, 14 Nov 2023 16:48:49 +0000 [thread overview] Message-ID: <bug-112481-4-YjERSUw4qt@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-112481-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481 --- Comment #12 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Andrew Stubbs <ams@gcc.gnu.org>: https://gcc.gnu.org/g:948b8b6e0e50958ecf56d4d9fb7ac16f245d9cc3 commit r14-5453-g948b8b6e0e50958ecf56d4d9fb7ac16f245d9cc3 Author: Andrew Stubbs <ams@codesourcery.com> Date: Tue Nov 14 16:07:37 2023 +0000 Fix ICE generating uniform vector masks Most targets have an "and" instructions for their vector mask size, but RISC-V only has DImode "and". Fixed by allowing wider instruction modes. gcc/ChangeLog: PR target/112481 * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment.
next prev parent reply other threads:[~2023-11-14 16:48 UTC|newest] Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-11-10 21:42 [Bug target/112481] New: " patrick at rivosinc dot com 2023-11-10 21:44 ` [Bug target/112481] " pinskia at gcc dot gnu.org 2023-11-10 23:39 ` patrick at rivosinc dot com 2023-11-10 23:59 ` patrick at rivosinc dot com 2023-11-11 0:08 ` patrick at rivosinc dot com 2023-11-13 8:09 ` rguenth at gcc dot gnu.org 2023-11-13 18:09 ` ams at gcc dot gnu.org 2023-11-13 19:45 ` patrick at rivosinc dot com 2023-11-14 8:04 ` rguenther at suse dot de 2023-11-14 10:40 ` ams at gcc dot gnu.org 2023-11-14 10:43 ` juzhe.zhong at rivai dot ai 2023-11-14 10:56 ` rguenther at suse dot de 2023-11-14 11:10 ` rdapp at gcc dot gnu.org 2023-11-14 14:26 ` law at gcc dot gnu.org 2023-11-14 16:48 ` cvs-commit at gcc dot gnu.org [this message] 2023-11-14 16:55 ` ams at gcc dot gnu.org 2023-11-14 18:52 ` law at gcc dot gnu.org
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