[Bug target/112481] New: [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[Bug target/112481] New: [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[patrick at rivosinc dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

            Bug ID: 112481
           Summary: [14 Regression] RISCV: ICE: Segmentation fault when
                    compiling pr110817-3.c
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: patrick at rivosinc dot com
  Target Milestone: ---

Created attachment 56559
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=56559&action=edit
-freport-bug output

> ./bin/riscv64-unknown-linux-gnu-gcc -march=rv64gc -mabi=lp64d -O1 ../gcc/gcc/testsuite/gcc.c-torture/execute/pr110817-3.c -freport-bug
during RTL pass: expand
../gcc/gcc/testsuite/gcc.c-torture/execute/pr110817-3.c: In function 'main':
../gcc/gcc/testsuite/gcc.c-torture/execute/pr110817-3.c:10:28: internal
compiler error: Segmentation fault
   10 |   volatile signed int t = x[0];
      |                           ~^~~
0x16626a3 crash_signal
        ../../../gcc/gcc/toplev.cc:316
0x120ff7f emit_move_insn(rtx_def*, rtx_def*)
        ../../../gcc/gcc/expr.cc:4249
0x1221488 expand_constructor
        ../../../gcc/gcc/expr.cc:8970
0x120c148 expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        ../../../gcc/gcc/expr.cc:11245
0x120c959 expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        ../../../gcc/gcc/expr.cc:10860
0x120f354 expand_expr(tree_node*, rtx_def*, machine_mode, expand_modifier)
        ../../../gcc/gcc/expr.h:310
0x120f354 expand_operands(tree_node*, tree_node*, rtx_def*, rtx_def**,
rtx_def**, expand_modifier)
        ../../../gcc/gcc/expr.cc:8627
0x1203e9a expand_expr_real_2(separate_ops*, rtx_def*, machine_mode,
expand_modifier)
        ../../../gcc/gcc/expr.cc:10628
0x120c8dd expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        ../../../gcc/gcc/expr.cc:10856
0x120a786 expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        ../../../gcc/gcc/expr.cc:12011
0x120c959 expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        ../../../gcc/gcc/expr.cc:10860
0x120f354 expand_expr(tree_node*, rtx_def*, machine_mode, expand_modifier)
        ../../../gcc/gcc/expr.h:310
0x120f354 expand_operands(tree_node*, tree_node*, rtx_def*, rtx_def**,
rtx_def**, expand_modifier)
        ../../../gcc/gcc/expr.cc:8627
0x12031c6 do_store_flag
        ../../../gcc/gcc/expr.cc:13283
0x12042cf expand_expr_real_2(separate_ops*, rtx_def*, machine_mode,
expand_modifier)
        ../../../gcc/gcc/expr.cc:10292
0x120c8dd expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        ../../../gcc/gcc/expr.cc:10856
0x120471a expand_expr_real(tree_node*, rtx_def*, machine_mode, expand_modifier,
rtx_def**, bool)
        ../../../gcc/gcc/expr.cc:9049
0x120471a expand_expr(tree_node*, rtx_def*, machine_mode, expand_modifier)
        ../../../gcc/gcc/expr.h:310
0x120471a expand_expr_real_2(separate_ops*, rtx_def*, machine_mode,
expand_modifier)
        ../../../gcc/gcc/expr.cc:9377
0x120c8dd expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        ../../../gcc/gcc/expr.cc:10856
Please submit a full bug report, with preprocessed source.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

Currently bisecting:
good: 879cf9ff45d94065d89e24b71c6b27c7076ac518
bad: a5922427c29fad177251d89cc946d1c5bfc135eb

-freport-bug output attached

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |ice-on-valid-code
   Target Milestone|---                         |14.0

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[patrick at rivosinc dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

--- Comment #1 from Patrick O'Neill <patrick at rivosinc dot com> ---
First bad commit: r14-5319-ga5922427c29

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[patrick at rivosinc dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

--- Comment #2 from Patrick O'Neill <patrick at rivosinc dot com> ---
Sorry - got overzealous and mixed up my terminals. Still bisecting.

Good: 8da8b9225762126ca41b12243d6531cd41a831b3
Bad: a5922427c29fad177251d89cc946d1c5bfc135eb

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[patrick at rivosinc dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

--- Comment #3 from Patrick O'Neill <patrick at rivosinc dot com> ---
Initial bisection was correct: r14-5319-ga5922427c29

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |rguenth at gcc dot gnu.org
           Priority|P3                          |P1
             Target|                            |riscv

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[ams at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

Andrew Stubbs <ams at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2023-11-13
     Ever confirmed|0                           |1
           Assignee|unassigned at gcc dot gnu.org      |ams at gcc dot gnu.org

--- Comment #4 from Andrew Stubbs <ams at gcc dot gnu.org> ---
It fails because optab_handler fails to find an instruction for "and_optab" in
SImode.  I didn't consider handling that case; seems so unlikely.

I guess architectures that can't "and" masks don't get to have safe masks? ...
I'll work on a fix.

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[patrick at rivosinc dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

Patrick O'Neill <patrick at rivosinc dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |juzhe.zhong at rivai dot ai,
                   |                            |patrick at rivosinc dot com

--- Comment #5 from Patrick O'Neill <patrick at rivosinc dot com> ---
+cc Juzhe to make sure it shouldn't be fixed by defining a new insn in the
risc-v backend.

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[rguenther at suse dot de]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

--- Comment #6 from rguenther at suse dot de <rguenther at suse dot de> ---
On Mon, 13 Nov 2023, ams at gcc dot gnu.org wrote:

> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481
> 
> Andrew Stubbs <ams at gcc dot gnu.org> changed:
> 
>            What    |Removed                     |Added
> ----------------------------------------------------------------------------
>              Status|UNCONFIRMED                 |ASSIGNED
>    Last reconfirmed|                            |2023-11-13
>      Ever confirmed|0                           |1
>            Assignee|unassigned at gcc dot gnu.org      |ams at gcc dot gnu.org
> 
> --- Comment #4 from Andrew Stubbs <ams at gcc dot gnu.org> ---
> It fails because optab_handler fails to find an instruction for "and_optab" in
> SImode.  I didn't consider handling that case; seems so unlikely.

It sounds odd at least - I don't remember us having fallback for this.
Ah, well, maybe OPTAB_WIDEN - guess that might be a hint how to fix it?

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[ams at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

--- Comment #7 from Andrew Stubbs <ams at gcc dot gnu.org> ---
Simply changing to OPTAB_WIDEN solves the ICE, but I don't know if it does so
in a sensible way, for RISC V.

@@ -7489,7 +7489,7 @@ store_constructor (tree exp, rtx target, int cleared,
poly_int64 size,
            if (maybe_ne (GET_MODE_PRECISION (mode), nunits))
              tmp = expand_binop (mode, and_optab, tmp,
                                  GEN_INT ((1 << nunits) - 1), target,
-                                 true, OPTAB_DIRECT);
+                                 true, OPTAB_WIDEN);
            if (tmp != target)
              emit_move_insn (target, tmp);
            break;

Here are the instructions it generates:

(set (reg:DI 165)
    (and:DI (subreg:DI (reg:SI 164) 0)
        (const_int 1 [0x1])))
(set (reg:SI 154)
    (subreg:SI (reg:DI 165) 0))

Should I use that patch? I think it's harmless on targets where OPTAB_DIRECT
would work.

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[juzhe.zhong at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

--- Comment #8 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
I am not familiar with scalar stuff of RISC-V.

CCing kito, Robin and Jeff to confirm this issue.

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[rguenther at suse dot de]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

--- Comment #9 from rguenther at suse dot de <rguenther at suse dot de> ---
On Tue, 14 Nov 2023, ams at gcc dot gnu.org wrote:

> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481
> 
> --- Comment #7 from Andrew Stubbs <ams at gcc dot gnu.org> ---
> Simply changing to OPTAB_WIDEN solves the ICE, but I don't know if it does so
> in a sensible way, for RISC V.
> 
> @@ -7489,7 +7489,7 @@ store_constructor (tree exp, rtx target, int cleared,
> poly_int64 size,
>             if (maybe_ne (GET_MODE_PRECISION (mode), nunits))
>               tmp = expand_binop (mode, and_optab, tmp,
>                                   GEN_INT ((1 << nunits) - 1), target,
> -                                 true, OPTAB_DIRECT);
> +                                 true, OPTAB_WIDEN);
>             if (tmp != target)
>               emit_move_insn (target, tmp);
>             break;
> 
> Here are the instructions it generates:
> 
> (set (reg:DI 165)
>     (and:DI (subreg:DI (reg:SI 164) 0)
>         (const_int 1 [0x1])))
> (set (reg:SI 154)
>     (subreg:SI (reg:DI 165) 0))
> 
> Should I use that patch? I think it's harmless on targets where OPTAB_DIRECT
> would work.

I think that's sensible.

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[rdapp at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

Robin Dapp <rdapp at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |palmer at dabbelt dot com

--- Comment #10 from Robin Dapp <rdapp at gcc dot gnu.org> ---
Palmer last touched this for the initial port:

;; For RV64, we don't expose the SImode operations to the rtl expanders,
;; but SImode versions exist for combine.

(define_expand "and<mode>3"

...

(define_insn "*<optab>si3_internal"
  [(set (match_operand:SI                 0 "register_operand" "=r,r")
        (any_bitwise:SI (match_operand:SI 1 "register_operand" "%r,r")
                        (match_operand:SI 2 "arith_operand"    " r,I")))]
  "TARGET_64BIT"
  "<insn>%i2\t%0,%1,%2"

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

Jeffrey A. Law <law at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |law at gcc dot gnu.org

--- Comment #11 from Jeffrey A. Law <law at gcc dot gnu.org> ---
It's sensible, but what's the value in having a SImode variant on rv64 when we
have WORD_REGISTER_OPERATIONS defined?

I think the right fix here is to remove that pattern (and potentially others
like it).

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

--- Comment #12 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Andrew Stubbs <ams@gcc.gnu.org>:

https://gcc.gnu.org/g:948b8b6e0e50958ecf56d4d9fb7ac16f245d9cc3

commit r14-5453-g948b8b6e0e50958ecf56d4d9fb7ac16f245d9cc3
Author: Andrew Stubbs <ams@codesourcery.com>
Date:   Tue Nov 14 16:07:37 2023 +0000

    Fix ICE generating uniform vector masks

    Most targets have an "and" instructions for their vector mask size, but
RISC-V
    only has DImode "and".  Fixed by allowing wider instruction modes.

    gcc/ChangeLog:

            PR target/112481
            * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment.

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[ams at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

Andrew Stubbs <ams at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #13 from Andrew Stubbs <ams at gcc dot gnu.org> ---
This should be fixed now.

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481

--- Comment #14 from Jeffrey A. Law <law at gcc dot gnu.org> ---
*** Bug 112530 has been marked as a duplicate of this bug. ***