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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/112494] ICE in ix86_cc_mode, at
 config/i386/i386.cc:16477
Date: Tue, 28 Nov 2023 15:57:38 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112494

--- Comment #9 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:99db2ce2419245e40808a9fad45113315496a907

commit r14-5933-g99db2ce2419245e40808a9fad45113315496a907
Author: Uros Bizjak <ubizjak@gmail.com>
Date:   Tue Nov 28 16:56:29 2023 +0100

    i386: Improve cmpstrnqi_1 insn pattern [PR112494]

    REPZ CMPSB instruction does not update FLAGS register when %ecx register
    equals zero.  Improve cmpstrnqi_1 insn pattern to set FLAGS_REG to its
    previous value instead of (const_int 0) when operand 2 equals zero.

            PR target/112494

    gcc/ChangeLog:

            * config/i386/i386.md (cmpstrnqi_1): Set FLAGS_REG to its previ=
ous
            value when operand 2 equals zero.
            (*cmpstrnqi_1): Ditto.
            (*cmpstrnqi_1 peephole2): Ditto.=