From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id BF7133848372; Mon, 13 Nov 2023 21:47:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BF7133848372 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1699912075; bh=fsYeCw3j0XetEibFLgz9PBqw1viap08FaFeuFIiQWys=; h=From:To:Subject:Date:In-Reply-To:References:From; b=jw240oo/a64ojq7ex1k8P1nWPXV1GTUc4n2GD5KYQsrVZsX8J39roOLavKcjurPAh 3cPigGLWngCiOQtkdUO8jtlkGBGNRyHLXhAFzhyRvoNnmva5AW/m7wUx5C+F0WE02g F88Ja9DMDWb1SzbqYOaNd515vggcZ7vRpnXoTlWg= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/112494] ICE in ix86_cc_mode, at config/i386/i386.cc:16477 Date: Mon, 13 Nov 2023 21:47:54 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: ubizjak at gmail dot com X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112494 --- Comment #8 from CVS Commits --- The master branch has been updated by Uros Bizjak : https://gcc.gnu.org/g:c75bab7274fe60fb2def8acf06ee9f4f856ce1ac commit r14-5419-gc75bab7274fe60fb2def8acf06ee9f4f856ce1ac Author: Uros Bizjak Date: Mon Nov 13 22:45:55 2023 +0100 i386: Return CCmode from ix86_cc_mode for unknown RTX code [PR112494] Combine wants to combine following instructions into an insn that can perform both an (arithmetic) operation and set the condition code. Dur= ing the conversion a new RTX is created, and combine passes the RTX code of= the innermost RTX expression of the CC use insn in which CC reg is used to SELECT_CC_MODE, to determine the new mode of the comparison: Trying 5 -> 8: 5: r98:DI=3D0xd7 8: flags:CCZ=3Dcmp(r98:DI,0) REG_EQUAL cmp(0xd7,0) Failed to match this instruction: (parallel [ (set (reg:CC 17 flags) (compare:CC (const_int 215 [0xd7]) (const_int 0 [0]))) (set (reg/v:DI 98 [ flags ]) (const_int 215 [0xd7])) ]) where: (insn 5 2 6 2 (set (reg/v:DI 98 [ flags ]) (const_int 215 [0xd7])) "pr112494.c":8:8 84 {*movdi_internal} (nil)) (insn 8 7 11 2 (set (reg:CCZ 17 flags) (compare:CCZ (reg/v:DI 98 [ flags ]) (const_int 0 [0]))) "pr112494.c":11:9 8 {*cmpdi_ccno_1} (expr_list:REG_EQUAL (compare:CCZ (const_int 215 [0xd7]) (const_int 0 [0])) (nil))) x86_cc_mode (AKA SELECT_CC_MODE) is not prepared to handle random RTX codes and triggers gcc_unreachable() when SET RTX code is passed to it. The patch removes gcc_unreachable() and returns CCmode for unknown RTX codes, so combine can try various combinations involving CC reg without triggering ICE. Please note that x86 MOV instructions do not set flags, so the above combination is not recognized as a valid x86 instruction. PR target/112494 gcc/ChangeLog: * config/i386/i386.cc (ix86_cc_mode) [default]: Return CCmode. gcc/testsuite/ChangeLog: * gcc.target/i386/pr112494.c: New test.=