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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112606] [14 Regression] powerpc64le-linux-gnu: 'FAIL:
 gcc.target/powerpc/p8vector-fp.c scan-assembler xsnabsdp'
Date: Fri, 24 Nov 2023 17:59:41 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112606

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org

--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
So
2023-11-24  Jakub Jelinek  <jakub@redhat.com>

        PR target/112606
        * config/rs6000/rs6000.md (copysign<mode>3): Change predicate
        of the last argument from gpc_reg_operand to any_operand.  If
        operands[2] is CONST_DOUBLE, emit abs or neg abs depending on
        its sign, otherwise if it doesn't satisfy gpc_reg_operand,
        force it to REG using copy_to_mode_reg.

--- gcc/config/rs6000/rs6000.md.jj      2023-10-13 19:34:43.927834877 +0200
+++ gcc/config/rs6000/rs6000.md 2023-11-24 18:54:13.587876170 +0100
@@ -5358,7 +5358,7 @@ (define_expand "copysign<mode>3"
    (set (match_dup 4)
        (neg:SFDF (abs:SFDF (match_dup 1))))
    (set (match_operand:SFDF 0 "gpc_reg_operand")
-        (if_then_else:SFDF (ge (match_operand:SFDF 2 "gpc_reg_operand")
+       (if_then_else:SFDF (ge (match_operand:SFDF 2 "any_operand")
                               (match_dup 5))
                         (match_dup 3)
                         (match_dup 4)))]
@@ -5369,6 +5369,24 @@ (define_expand "copysign<mode>3"
        || TARGET_CMPB
        || VECTOR_UNIT_VSX_P (<MODE>mode))"
 {
+  /* Middle-end canonicalizes -fabs (x) to copysign (x, -1),
+     but PowerPC prefers -fabs (x).  */
+  if (CONST_DOUBLE_AS_FLOAT_P (operands[2]))
+    {
+      if (real_isneg (CONST_DOUBLE_REAL_VALUE (operands[2])))
+       {
+         operands[3] =3D gen_reg_rtx (<MODE>mode);
+         emit_insn (gen_abs<mode>2 (operands[3], operands[1]));
+         emit_insn (gen_neg<mode>2 (operands[0], operands[3]));
+       }
+      else
+       emit_insn (gen_abs<mode>2 (operands[0], operands[1]));
+      DONE;
+    }
+
+  if (!gpc_reg_operand (operands[2], <MODE>mode))
+    operands[2] =3D copy_to_mode_reg (<MODE>mode, operands[2]);
+
   if (TARGET_CMPB || VECTOR_UNIT_VSX_P (<MODE>mode))
     {
       emit_insn (gen_copysign<mode>3_fcpsgn (operands[0], operands[1],

then?=