[Bug target/112648] New: RISC-V Vector parameter riscv-autovec-lmul value is ineffective

[Bug target/112648] New: RISC-V Vector parameter riscv-autovec-lmul value is ineffective

[jeremy.bennett at embecosm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112648

            Bug ID: 112648
           Summary: RISC-V Vector parameter riscv-autovec-lmul value is
                    ineffective
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: jeremy.bennett at embecosm dot com
  Target Milestone: ---

Created attachment 56656
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=56656&action=edit
Reproducer source

The GCC parameter riscv-autovec-lmul is used to force LMUL to be held to a
particular value. Vital for processors which do not support changing LMUL. The
parameter is not always effective.

Reproducer (test.c):

int a[8];
int b;
int c() {
  for (; b; b++)
    a[b] = (float)b;
}

Compile with:

riscv64-unknown-linux-gnu-gcc -march=rv64gcv -mabi=lp64d -O2
--param=riscv-autovec-lmul=m1 -S test.c

Detect value of LMUL != m1 using grep:

grep 'vsetvli.*\(\(m8\)\|\(m4\)\|\(m2\)\|\(mf2\)\|\(mf4\)\|\(mf8\)\)' test.s

Output is:

        vsetvli a4,a3,e8,mf4,ta,ma

System information
==================

Using built-in specs.
COLLECT_GCC=riscv64-unknown-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/home/jeremy/gittrees/mustang/install/libexec/gcc/riscv64-unknown-linux-gnu/14.0.0/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with: /home/jeremy/gittrees/mustang/gcc/configure
--target=riscv64-unknown-linux-gnu
--prefix=/home/jeremy/gittrees/mustang/install
--with-sysroot=/home/jeremy/gittrees/mustang/install/sysroot
--with-pkgversion=g41aacdea55c --with-system-zlib --enable-shared --enable-tls
--enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp
--disable-libquadmath --disable-libsanitizer --disable-nls --disable-bootstrap
--src=/home/jeremy/gittrees/mustang/gcc --enable-multilib --with-abi=lp64d
--with-arch=rv64gc --with-tune= --with-isa-spec=20191213 'CFLAGS_FOR_TARGET=-O2
   -mcmodel=medany' 'CXXFLAGS_FOR_TARGET=-O2    -mcmodel=medany'
Thread model: posix
Supported LTO compression algorithms: zlib
gcc version 14.0.0 20231121 (experimental) (g41aacdea55c)

[Bug target/112648] RISC-V Vector parameter riscv-autovec-lmul value is ineffective

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112648

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
Note that using a --param for a correctness thing isn't recommended, I'd
transition that to -mvect-lmul=N as it also shouldn't only apply to
auto-vectorization.

[Bug target/112648] RISC-V Vector parameter riscv-autovec-lmul value is ineffective

[jeremy.bennett at embecosm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112648

--- Comment #2 from Jeremy Bennett <jeremy.bennett at embecosm dot com> ---
Thanks Richard. Bug 112651 filed to capture this suggestion.

[Bug target/112648] RISC-V Vector parameter riscv-autovec-lmul value is ineffective

[jeremy.bennett at embecosm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112648

--- Comment #3 from Jeremy Bennett <jeremy.bennett at embecosm dot com> ---
Following a discussion on the weekly call, it seems that I have misunderstood
the purpose of this parameter. It seems it is a hint to the optimizer that a
particular LMUL value is most efficient, not as a mandate to only use that LMUL
value.

I have raised Bug 112650 to update the GCC documentation for RISC-V parameters.
Once the behavior is confirmed, this bug can be closed.

I shall also update Bug 112651, since there is a need to force LMUL to
particular values for chips which do not implement all LMUL values.

[Bug target/112648] RISC-V Vector parameter riscv-autovec-lmul value is ineffective

[juzhe.zhong at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112648

JuzheZhong <juzhe.zhong at rivai dot ai> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |juzhe.zhong at rivai dot ai

--- Comment #4 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
Rather than talk about the compile option.

I confirm the riscv-autovec-lmul is correct.

https://godbolt.org/z/nzfWE98n7

It does using e32m1 for vectorized codes:

vsetvli zero,a3,e32,m1,ta,ma
        vfcvt.f.x.v     v2,v1
        vfcvt.rtz.x.f.v v2,v2
        vse32.v v2,0(a5)

It definitely correct.

The reason you saw:
vsetvli a3,a4,e8,mf4,ta,ma

Plz note that this is not the vsetvl to configure the vectorized codes
operations.
It just a instruction calculating the elements to be processed for each
iterator.
It's generated by SELECT_VL pattern.
So, for SELECT_VL here,
vsetvli a3,a4,e8,mf4,ta,ma or vsetvli a3,a4,e32,m1,ta,ma are correct.
Since they are having same ratio.

More details on risc-v v spec.