public inbox for gcc-bugs@sourceware.org
help / color / mirror / Atom feed
* [Bug middle-end/112660] New: missed-optimization: combine shifts when shifted out bits are known 0
@ 2023-11-21 22:03 goon.pri.low at gmail dot com
2023-11-24 22:10 ` [Bug middle-end/112660] " goon.pri.low at gmail dot com
2023-11-24 23:01 ` pinskia at gcc dot gnu.org
0 siblings, 2 replies; 3+ messages in thread
From: goon.pri.low at gmail dot com @ 2023-11-21 22:03 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112660
Bug ID: 112660
Summary: missed-optimization: combine shifts when shifted out
bits are known 0
Product: gcc
Version: 13.2.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: goon.pri.low at gmail dot com
Target Milestone: ---
This function here we know the shifted out bits have to be 0:
int unopt(int v) {
if (v & 3) return -1;
return v >> 2 << 5;
}
unopt:
test dil, 3
jne .L3
sar edi, 2
mov eax, edi
sal eax, 5
ret
.L3:
mov eax, -1
ret
Therefore we could combine the shifts:
int opt(int v) {
if (v & 3) return -1;
return v << 3;
}
opt:
test dil, 3
jne .L7
lea eax, [0+rdi*8]
ret
.L7:
mov eax, -1
ret
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug middle-end/112660] missed-optimization: combine shifts when shifted out bits are known 0
2023-11-21 22:03 [Bug middle-end/112660] New: missed-optimization: combine shifts when shifted out bits are known 0 goon.pri.low at gmail dot com
@ 2023-11-24 22:10 ` goon.pri.low at gmail dot com
2023-11-24 23:01 ` pinskia at gcc dot gnu.org
1 sibling, 0 replies; 3+ messages in thread
From: goon.pri.low at gmail dot com @ 2023-11-24 22:10 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112660
--- Comment #1 from gooncreeper <goon.pri.low at gmail dot com> ---
This could be further extended for signed integers as we can assume for left
shifts that shifted out bits are always 0 else UB, and always combine x << a >>
b.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug middle-end/112660] missed-optimization: combine shifts when shifted out bits are known 0
2023-11-21 22:03 [Bug middle-end/112660] New: missed-optimization: combine shifts when shifted out bits are known 0 goon.pri.low at gmail dot com
2023-11-24 22:10 ` [Bug middle-end/112660] " goon.pri.low at gmail dot com
@ 2023-11-24 23:01 ` pinskia at gcc dot gnu.org
1 sibling, 0 replies; 3+ messages in thread
From: pinskia at gcc dot gnu.org @ 2023-11-24 23:01 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112660
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to gooncreeper from comment #1)
> This could be further extended for signed integers as we can assume for left
> shifts that shifted out bits are always 0 else UB, and always combine x << a
> >> b.
Not for C90 ... So for gimple and RTL level we can't assume that.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-11-24 23:01 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-11-21 22:03 [Bug middle-end/112660] New: missed-optimization: combine shifts when shifted out bits are known 0 goon.pri.low at gmail dot com
2023-11-24 22:10 ` [Bug middle-end/112660] " goon.pri.low at gmail dot com
2023-11-24 23:01 ` pinskia at gcc dot gnu.org
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).