From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 7096C3858D32; Fri, 24 Nov 2023 23:01:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7096C3858D32 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1700866874; bh=pXY8LFbZUw8oSMKxCmA7C9u9zZqqoPH4Uo0zO/1B40Y=; h=From:To:Subject:Date:In-Reply-To:References:From; b=OKBH1nkpLUcK+KM8yicmNSgXFLehqxiylsl83Xf0qdRc3CXcBrQaqjkg3/hik07th 2XO3ZRP8q20gpmqDBuR28p7m3NL0DnZjjjuoIpDH5Nd5VaNfIdTjKKgtS5G//pOFmI EfAja8UnQ+kRvJz4eNqayzzJ1egi0wx+w4AN/0mc= From: "pinskia at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/112660] missed-optimization: combine shifts when shifted out bits are known 0 Date: Fri, 24 Nov 2023 23:01:13 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: middle-end X-Bugzilla-Version: 13.2.1 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: pinskia at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112660 --- Comment #2 from Andrew Pinski --- (In reply to gooncreeper from comment #1) > This could be further extended for signed integers as we can assume for l= eft > shifts that shifted out bits are always 0 else UB, and always combine x <= < a > >> b. Not for C90 ... So for gimple and RTL level we can't assume that.=