From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id B8D2C3857340; Tue, 28 Nov 2023 02:26:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B8D2C3857340 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1701138373; bh=132hFyariADKmXaJCH2GdCYYuGqYCgW+1H6kpXhEZ9I=; h=From:To:Subject:Date:In-Reply-To:References:From; b=YVJ9Kuj7zVXNpU/QPZVWAJAAz6G+kbDF2tF8PF0Jen+NhQvWXgwsbs6QnJPb1RCpW 9Wn+iq28ALHqKGdim83KP16oSB3YH+wrSf/bC4kBcf3Anmck0+8b+A24sGRvK6wh5e mBUzJTTMGytWHMSfibVRHWebGC2dEbec21IZxkr8= From: "linkw at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/112707] [14 regression] gcc 14 outputs invalid assembly on ppc: Error: unrecognized opcode: `fctid' Date: Tue, 28 Nov 2023 02:26:13 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: assemble-failure X-Bugzilla-Severity: normal X-Bugzilla-Who: linkw at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: guihaoc at gcc dot gnu.org X-Bugzilla-Target-Milestone: 14.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112707 --- Comment #10 from Kewen Lin --- (In reply to HaoChen Gui from comment #9) > (In reply to Segher Boessenkool from comment #8) > > Yeah, it tested for ISA 2.04 before. That was an attempt at including = 476 > > probably? > >=20 > > We really should have a TARGET_FCTID, on for TARGET_POWERPC64 or for cp= u 476 > > (so > > NOT user-selectable separately, of course!); not try to use pre-existing > > flags for this, which might work but will forever stay confusing. > >=20 > > So either a separate OPTION_FCTID for in rs6000-cpus.def, or TARGET_FCT= ID.=20 > > Either > > works for me. > >=20 > > (Background: in ISA 1.xx it was for 64-bit implementations only. But it > > does not > > need 64-bit registers or a 64-bit integer pipeline at all, it is an FP > > instruction > > that works on FP registers, which always are 64-bit. The instruction w= as > > implemented > > on the 476). >=20 > Thanks for your explanation. >=20 > I found "fctid" is supported on PPC64 and PPC476 from assembler source co= de. > {=E2=80=9Cfctid=E2=80=9D, XRC(63,814,0), XRA_MASK, PPC64, P= PCVLE,=20=20=20=20=20=20=20=20 > {FRT, FRB}}, > {=E2=80=9Cfctid=E2=80=9D, XRC(63,814,0), XRA_MASK, PPC476, P= PCVLE,=20=20=20=20=20=20=20=20 > {FRT, FRB}}, >=20 > But powerpc7450 only enables PPC. That's why assembler complains. > { "7450", PPC_OPCODE_PPC | PPC_OPCODE_7450 | PPC_OPCODE_ALTIVEC, 0 }, >=20 > My question is: can "fctid" be executed on powerpc7450 such a 32bit > processor? If it's supported, should the assembler be changed also (repla= ce > the PPC64 with PPC for fctid)? Good question, I think it's no, the assembler implementation looks to match= the documentation, as I can't find insn fctid in powerpc7450 doc: https://www.nxp.com.cn/docs/en/reference-manual/MPC7450UM.pdf=