From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
	id 4B38D385828C; Fri,  1 Dec 2023 06:50:10 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4B38D385828C
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1701413410;
	bh=SlkdZB5MrnWxh6Q/jSsNC4xvvu8ToTxt1/1wWVGewGg=;
	h=From:To:Subject:Date:In-Reply-To:References:From;
	b=h1On0w0qi8o7sDvgkjXaSyRcTodY/qLUOqrjYWkNdS8Uzn+/wFpDBQbB1RBkGWVVk
	 F/hDI7z8aJN7euxxeQIaCySSrE82O7b4NUK5POxqn3yDxGPXZycwJA/ZqFZNuKCozv
	 lKKNshM8Xe2awGj3djryeU+D4asPZB3X1367u13s=
From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112776] RISC-V Regression: Missed optimization of VSETVL
 PASS
Date: Fri, 01 Dec 2023 06:50:09 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: target
X-Bugzilla-Version: 14.0
X-Bugzilla-Keywords: missed-optimization
X-Bugzilla-Severity: normal
X-Bugzilla-Who: cvs-commit at gcc dot gnu.org
X-Bugzilla-Status: UNCONFIRMED
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: ---
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: 
Message-ID: <bug-112776-4-2pQF3kUhVO@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-112776-4@http.gcc.gnu.org/bugzilla/>
References: <bug-112776-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
List-Id: <gcc-bugs.sourceware.org>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112776

--- Comment #1 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Lehua Ding <lhtin@gcc.gnu.org>:

https://gcc.gnu.org/g:923a67f17badcbe6e2b2e5d3570a265443258c8e

commit r14-6027-g923a67f17badcbe6e2b2e5d3570a265443258c8e
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Fri Dec 1 08:39:57 2023 +0800

    RISC-V: Fix VSETVL PASS regression

    This patch fix 2 regression (one is bug regression, the other is
performance regression).
    Those 2 regressions are both we are comparing ratio for same AVL in wro=
ng
place.

    1. BUG regression:
    avl_single-84.c:

    f0:
            li      a5,999424
            add     a1,a1,a5
            li      a4,299008
            add     a5,a0,a5
            addi    a3,a4,992
            addi    a5,a5,576
            addi    a1,a1,576
            vsetvli a4,zero,e8,m2,ta,ma
            add     a0,a0,a3
            vlm.v   v1,0(a5)
            vsm.v   v1,0(a1)
            vl1re64.v       v1,0(a0)
            beq     a2,zero,.L10
            li      a5,0
            vsetvli zero,zero,e64,m1,tu,ma   --->  This is totally incorrect
since the ratio above is 4, wheras it is demanding ratio =3D 64 here.
    .L3:
            fcvt.d.lu       fa5,a5
            addi    a5,a5,1
            fadd.d  fa5,fa5,fa0
            vfmv.s.f        v1,fa5
            bne     a5,a2,.L3
            vfmv.f.s        fa0,v1
            ret
    .L10:
            vsetvli zero,zero,e64,m1,ta,ma
            vfmv.f.s        fa0,v1
            ret

    2. Performance regression:

    before this patch:

            vsetvli a5,a4,e8,m1,ta,ma
            vsetvli zero,a5,e32,m1,tu,ma
            vmv.s.x v2,zero
            vmv.s.x v1,zero
            vsetvli zero,a5,e32,m4,tu,ma
            vle32.v v4,0(a1)
            vfmul.vv        v4,v4,v4
            vfredosum.vs    v1,v4,v2
            vfmv.f.s        fa5,v1
            fsw     fa5,0(a0)
            sub     a4,a4,a5
            bne     a4,zero,.L2
            ret

    After this patch:

            vsetvli a5,a4,e32,m4,tu,ma
            vle32.v v4,0(a1)
            vmv.s.x v2,zero
            vmv.s.x v1,zero
            vfmul.vv        v4,v4,v4
            vfredosum.vs    v1,v4,v2
            vfmv.f.s        fa5,v1
            fsw     fa5,0(a0)
            sub     a4,a4,a5
            bne     a4,zero,.L2
            ret

    Tested rv64gcv_zvfh_zfh passed no regression.

    zvl256b/zvl512b/zvl1024b/zve64d is runing.

            PR target/112776

    gcc/ChangeLog:

            * config/riscv/riscv-vsetvl.cc
(pre_vsetvl::pre_global_vsetvl_info): Fix ratio.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/vsetvl/avl_single-84.c: Adapt test.
            * gcc.target/riscv/rvv/vsetvl/pr111037-3.c: Ditto.
            * gcc.target/riscv/rvv/vsetvl/pr112776.c: New test.=