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From: "juzhe.zhong at rivai dot ai" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112801] [14] RISC-V vector: failure to mask top bits
 during type conversion
Date: Fri, 01 Dec 2023 08:26:24 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112801

--- Comment #3 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
(In reply to Richard Biener from comment #2)
> I think wrong-code should be high-priority ;)

Oh. I see. Sorry. I thought it was the previous RVV shift ISA issue.
since I saw c(g[1] >> 32);

Confirm it is wrong code. Will take a look at it.

Thanks for remind.=