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From: "vineetg at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112817] RISC-V: RVV: provide a preprocessor macro for
 VLS codegen
Date: Mon, 08 Jan 2024 23:18:42 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112817

--- Comment #9 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
(In reply to JuzheZhong from comment #5)
> Support VLS codegen with -mrvv-vector-bits and attribute is reasonable to=
 be
> landed on GCC-14.
>=20
> Could you first implement -mrvv-vector-bits feature ?
>=20
> I have support it in rvv-next, but I don't have time to migrate that into
> trunk GCC.

I presume you are referring to https://github.com/riscv-collab/riscv-gcc.git
and #riscv-gcc-rvv-next

I don't see the attribute support. Is it called something else there ?

I was looking for a new entry in gcc/c-family/c-attribs.cc or would be
somewhere else.=