From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 33C993858404; Fri, 1 Dec 2023 22:31:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 33C993858404 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1701469881; bh=ZP/QS4NYtTCTT1NZ+QfNxO5rSRabhLfnCri3rlfATRI=; h=From:To:Subject:Date:In-Reply-To:References:From; b=Nn/hyZ3WJsmDZ+Ag6XsQRKV7oLxWdeQVdLLYsGTkI+7tjMlp/KoMJt9XinYluEcSe oUvQiqNP7eXLM2ScMVIH9evGEQSiv5k1hxuqrXgMFGDsnyOFTiM/xGMPzpAbfryX0R rO1jTLV46oWiCNamWYNlHKQxyGN8H7ahctKdThug= From: "juzhe.zhong at rivai dot ai" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/112817] RISC-V: RVV: provide a preprocessor macro for VLS codegen Date: Fri, 01 Dec 2023 22:31:20 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: juzhe.zhong at rivai dot ai X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112817 --- Comment #5 from JuzheZhong --- Support VLS codegen with -mrvv-vector-bits and attribute is reasonable to be landed on GCC-14. But currently we are busy with fixing bugs (me, Robin, Lixu@eswin, Li Pan@intel). You can see gcc-patch list... Could you first implement -mrvv-vector-bits feature ? I have support it in rvv-next, but I don't have time to migrate that into t= runk GCC.=