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From: "juzhe.zhong at rivai dot ai" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112817] RISC-V: RVV: provide a preprocessor macro for
 VLS codegen
Date: Fri, 01 Dec 2023 23:24:15 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112817

--- Comment #7 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
(In reply to Vineet Gupta from comment #6)
> (In reply to JuzheZhong from comment #5)
>=20
> > Support VLS codegen with -mrvv-vector-bits and attribute is reasonable =
to be
> > landed on GCC-14.
>=20
> I don't think that is the reqmt for this issue. Just defining the
> preprocessor flag with existing gcc toggle for VLS codegen should be enou=
gh
> - as long as it generates same macro as llvm.

So, what do you mean ? I don't understand.
If you doesn't need attribute, how to fix the issue.=