From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
	id DD6E73858404; Fri,  1 Dec 2023 21:50:06 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DD6E73858404
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1701467406;
	bh=6YMpgl4+XyPZqagaQnQJZye2beKY0LXGJfw1qt2AlOU=;
	h=From:To:Subject:Date:From;
	b=Y1lHh+rBZo2Ap8pvSLb8JQgHZtHVchc3iclhIytcqy3NAwXcJUvUV6CfSHunOF5ax
	 CcNKPlBm39bY1e7XzjayZOP5onmEEPX7I50sAvfB05sJkyQH8sXBzbdlTrFBGIndTN
	 UFviO5CdIY7l1RwCEu0jSZbpbUjAZE9WwtwT23Vc=
From: "vineetg at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112817] New: RISC-V: RVV: provide a preprocessor macro
 for VLS codegen
Date: Fri, 01 Dec 2023 21:50:06 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: new
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: target
X-Bugzilla-Version: 14.0
X-Bugzilla-Keywords: 
X-Bugzilla-Severity: normal
X-Bugzilla-Who: vineetg at gcc dot gnu.org
X-Bugzilla-Status: UNCONFIRMED
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: ---
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status
 bug_severity priority component assigned_to reporter cc target_milestone
Message-ID: <bug-112817-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
List-Id: <gcc-bugs.sourceware.org>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D112817

            Bug ID: 112817
           Summary: RISC-V: RVV: provide a preprocessor macro for VLS
                    codegen
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: vineetg at gcc dot gnu.org
                CC: ewlu at rivosinc dot com, juzhe.zhong at rivai dot ai,
                    rdapp at gcc dot gnu.org
  Target Milestone: ---

LLVM toggle for setting up fixed vector length using -mrvv-vector-bits=3Dzvl
(which in turn derives VL from -march=3D...-vl256) also generates a preproc=
essor
define __riscv_v_fixed_vlen.

gcc doesn't, which is a bit of pain for downstream projects such as xsimd.

Granted the C-API document [1] doesn't specify this, generation by llvm and
more importantly usage in downstream projects seems good enough of a
requirement to have it in gcc as well.

[1] https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-ap=
i.md=