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From: "patrick at rivosinc dot com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/112855] [14] RISC-V vector: vsetivli clobbers variable value Date: Tue, 05 Dec 2023 18:54:24 +0000 [thread overview] Message-ID: <bug-112855-4-oToVhNvJCk@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-112855-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112855 Patrick O'Neill <patrick at rivosinc dot com> changed: What |Removed |Added ---------------------------------------------------------------------------- Summary|[14] RISC-V vector: Appears |[14] RISC-V vector: |to be overwriting stack arg |vsetivli clobbers variable | |value --- Comment #1 from Patrick O'Neill <patrick at rivosinc dot com> --- lw a5,%lo(b)(a3) load the value of b (100) into a5 vsetivli a5,5,e32,m1,ta,ma clobbers the a5 regsiter which previously held b addiw a1,a5,1 a5 is treated as b (this is the b++ statement) sw a1,%lo(b)(a3) and a1 (a5+1) is stored to b. It appears like the compiler doesn't realize that vsetivli clobbers a5.
next prev parent reply other threads:[~2023-12-05 18:54 UTC|newest] Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-12-05 5:21 [Bug target/112855] New: [14] RISC-V vector: overwriting stack args patrick at rivosinc dot com 2023-12-05 18:54 ` patrick at rivosinc dot com [this message] 2023-12-06 14:36 ` [Bug target/112855] [14] RISC-V vector: vsetivli clobbers variable value cvs-commit at gcc dot gnu.org 2023-12-06 18:54 ` patrick at rivosinc dot com
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