From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 476133858C53; Thu, 11 Jan 2024 02:45:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 476133858C53 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1704941132; bh=1Ihd5SworTHM3qoYinwp4iq8nRCvFXoKaKwRikcm81c=; h=From:To:Subject:Date:In-Reply-To:References:From; b=UZM9AENHMemQbdx3bfosG1Dc5C833/wMWOoNE+Hw9Y0h2q+vjPtEjtihu6MDK8R5R zcb+ttdvzz7bAfYV/Aqd1oHyRxmOstHkqdX6RwQ1TxT4IxubxZlaPr+poFkLdzpwFJ UnHtXrDfW0OGGNkPeSsxjpVZ/2a2/SIKCxE4YC3w= From: "gkm at rivosinc dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/113010] [RISCV] sign-extension lost in comparison with constant embedded in comma-op expression Date: Thu, 11 Jan 2024 02:45:31 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: gkm at rivosinc dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113010 --- Comment #6 from Greg McGary --- (In reply to Andrew Pinski from comment #5) > (In reply to Andrew Pinski from comment #4) > > (In reply to Greg McGary from comment #3) > > > This fixes it, though I would like second look from someone more fami= liar > > > with the combiner: > >=20 > > I almost sure this is still an issue with WORD_REGISTER_OPERATIONS . >=20 > That is this is missing that check: >=20 > ``` > /* Convert sign extension to zero extension, if we know that the high > bit is not set, as this is easier to optimize. It will be converted > back to cheaper alternative in make_extraction. */ > if (GET_CODE (x) =3D=3D SIGN_EXTEND > && HWI_COMPUTABLE_MODE_P (mode) > && ((nonzero_bits (XEXP (x, 0), inner_mode) > & ~(((unsigned HOST_WIDE_INT) GET_MODE_MASK (inner_mode)) >> 1= )) > =3D=3D 0)) >=20 > ``` >=20 > Should most likely need the same check as what was added in r14-6806 . And > yes it a similar bug dealing with WORD_REGISTER_OPERATIONS which is why I > thought it was the same. I agree that it pertains to WORD_REGISTER_OPERATIONS. However, the check ne= eds to happen. The test for converting SIGN_EXTEND to ZERO_EXTEND is false for MEM_P (x) already. The erroneous conversion to SUBREG happens farther down, here: ``` modewidth =3D GET_MODE_PRECISION (mode); if (modewidth >=3D pos + len) { =3D> tem =3D gen_lowpart (mode, XEXP (x, 0)); if (!tem || GET_CODE (tem) =3D=3D CLOBBER) return x; tem =3D simplify_shift_const (NULL_RTX, ASHIFT, mode, tem, modewidth - pos - len); tem =3D simplify_shift_const (NULL_RTX, unsignedp ? LSHIFTRT : ASHIFT= RT, mode, tem, modewidth - len); } ``` This fix honors WORD_REGISTER_OPERATIONS, and adds a test: ``` diff --git a/gcc/combine.cc b/gcc/combine.cc index 812553c091e..ba587184dfc 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -7208,6 +7208,11 @@ expand_compound_operation (rtx x) if (len =3D=3D 0) return x; + /* Sign-extending loads can never be simplified at compile time. */ + if (WORD_REGISTER_OPERATIONS && MEM_P (XEXP (x, 0)) + && load_extend_op (inner_mode) =3D=3D SIGN_EXTEND) + return x; + break; case ZERO_EXTRACT: diff --git a/gcc/testsuite/gcc.c-torture/execute/pr113010.c b/gcc/testsuite/gcc.c-torture/execute/pr113010.c new file mode 100644 index 00000000000..a95c613c1df --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr113010.c @@ -0,0 +1,9 @@ +int minus_1 =3D -1; + +int +main () +{ + if ((0, 0xfffffffful) >=3D minus_1) + __builtin_abort (); + return 0; +} ```=