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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/113048] [13/14 Regression] ICE: in
 lra_split_hard_reg_for, at lra-assigns.cc:1862 (unable to find a register to
 spill) {*andndi3_doubleword_bmi} with -march=cascadelake since r13-1716
Date: Fri, 05 Jan 2024 09:59:49 +0000
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X-Bugzilla-Type: changed
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X-Bugzilla-Product: gcc
X-Bugzilla-Component: rtl-optimization
X-Bugzilla-Version: 14.0
X-Bugzilla-Keywords: ice-on-valid-code, ra
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113048

Uro=C5=A1 Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|target                      |rtl-optimization

--- Comment #5 from Uro=C5=A1 Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #3)
> Started with r13-1716-gfd3d25d6df1cbd385d2834ff3059dfb6905dd75c

There is nothing wrong with the constrints in *andndi3_doubleword_bmi:

(define_insn_and_split "*andn<dwi>3_doubleword_bmi"
  [(set (match_operand:<DWI> 0 "register_operand" "=3D&r,r,r")
        (and:<DWI>
          (not:<DWI> (match_operand:<DWI> 1 "register_operand" "r,0,r"))
          (match_operand:<DWI> 2 "nonimmediate_operand" "ro,ro,0")))
   (clobber (reg:CC FLAGS_REG))]

Reconfirmed as RA problem.=