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From: "juzhe.zhong at rivai dot ai" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/113087] [14] RISC-V rv64gcv vector: Runtime mismatch
 with rv64gc
Date: Wed, 24 Jan 2024 22:29:13 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113087

--- Comment #44 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
(In reply to Patrick O'Neill from comment #43)
> (In reply to Patrick O'Neill from comment #42)
> > I kicked off a run roughly 10 hours ago with your memory-hog fix patch
> > applied to a1b2953924c451ce90a3fdce6841b63bf05f335f. I'll post the resu=
lts
> > here when the runs complete. Thanks!
>=20
> No new failures!
>=20
> zvl128b:
> no fails!
>=20
> zvl256b:
> 549.fotonik3d (runtime) - pr113570 (looks like this fail is since I used
> -Ofast)

Thanks. Could you trigger full coverage testing of SPEC with these following
combination compile option:


-march=3Drv64gcv --param=3Driscv-autovec-lmul=3Dm2
-march=3Drv64gcv --param=3Driscv-autovec-lmul=3Dm4
-march=3Drv64gcv --param=3Driscv-autovec-lmul=3Dm8
-march=3Drv64gcv --param=3Driscv-autovec-lmul=3Ddynamic

-march=3Drv64gcv_zvl256b --param=3Driscv-autovec-lmul=3Dm2
-march=3Drv64gcv_zvl256b --param=3Driscv-autovec-lmul=3Dm4
-march=3Drv64gcv_zvl256b --param=3Driscv-autovec-lmul=3Dm8
-march=3Drv64gcv_zvl256b --param=3Driscv-autovec-lmul=3Ddynamic

-march=3Drv64gcv_zvl512b --param=3Driscv-autovec-lmul=3Dm2
-march=3Drv64gcv_zvl512b --param=3Driscv-autovec-lmul=3Dm4
-march=3Drv64gcv_zvl512b --param=3Driscv-autovec-lmul=3Dm8
-march=3Drv64gcv_zvl512b --param=3Driscv-autovec-lmul=3Ddynamic

-march=3Drv64gcv --param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv --param=3Driscv-autovec-lmul=3Dm2
--param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv --param=3Driscv-autovec-lmul=3Dm4
--param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv --param=3Driscv-autovec-lmul=3Dm8
--param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv --param=3Driscv-autovec-lmul=3Ddynamic
--param=3Driscv-autovec-preference=3Dfixed-vlmax

-march=3Drv64gcv_zvl256b --param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv_zvl256b --param=3Driscv-autovec-lmul=3Dm2
--param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv_zvl256b --param=3Driscv-autovec-lmul=3Dm4
--param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv_zvl256b --param=3Driscv-autovec-lmul=3Dm8
--param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv_zvl256b --param=3Driscv-autovec-lmul=3Ddynamic
--param=3Driscv-autovec-preference=3Dfixed-vlmax

-march=3Drv64gcv_zvl512b --param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv_zvl512b --param=3Driscv-autovec-lmul=3Dm2
--param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv_zvl512b --param=3Driscv-autovec-lmul=3Dm4
--param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv_zvl512b --param=3Driscv-autovec-lmul=3Dm8
--param=3Driscv-autovec-preference=3Dfixed-vlmax
-march=3Drv64gcv_zvl512b --param=3Driscv-autovec-lmul=3Ddynamic
--param=3Driscv-autovec-preference=3Dfixed-vlmax

I believe they can be separate tasks assigned muitl-cores or muti-thread run
simultaneously.=