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From: "patrick at rivosinc dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/113087] [14] RISC-V rv64gcv vector: Runtime mismatch
 with rv64gc
Date: Wed, 10 Jan 2024 22:16:03 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113087

--- Comment #30 from Patrick O'Neill <patrick at rivosinc dot com> ---
(In reply to Li Pan from comment #29)
> Thanks a lot for the summary. Could you please help to share some more
> information about the spec2017 for above data? Like data set (test, train,
> or ref), the enviornment (qemu, spike, or hardware) as well as the spec
> config file. Just would like to make sure we are on the same page for the
> failures and reproducible from others.

Hi Pan,

We use nix to build/run spec so it's a bit opaque to me but I've extracted =
out:
ref data set
qemu
flags:
"-Ofast"
"-mtune=3Dgeneric-ooo"
"-march=3Drv64imafdcv_zba_zbb_zbs_zicond_zfa"
"-fno-lto"
"-ftree-vectorize"
"--param=3Driscv-autovec-preference=3Dscalable"

There are other flags that are are injected by the nix harness and I'm in t=
he
process of pulling them out. With these flags you should at least see the c=
am4
failure. Vineet is looking at the cam4 failure and is planning to open a
bugzilla with details.

Thanks,
Patrick=