From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id C394F3858CDB; Thu, 18 Jan 2024 16:32:33 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C394F3858CDB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1705595553; bh=WwwN1dQckGoQNerxuQu1iFtY3iNmne4azou+KeJ6J5Y=; h=From:To:Subject:Date:In-Reply-To:References:From; b=JcpqRGnAps+PnFKHuIjEih+dRq1uz7BUO35MzEJgAnrOS3QAE3+NBZtYK1YGzG5sC jRJAu7ikfPbxSJO0UoHcUbs5OHTOTyYDHHYR235vXdEeR3tNREtW6hRqRXFyiEBun2 lHQUvSskjrONurzJgqSXDIOpEfhwKdaIZ3M33r3k= From: "acoplan at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/113114] [14 Regression] ICE compiling gcc.c-torture/execute/pr59643.cwith -mabi=ilp32; in try_promote_writeback aarch64-ldp-fusion.cc Date: Thu, 18 Jan 2024 16:32:32 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: ice-on-valid-code, testsuite-fail X-Bugzilla-Severity: normal X-Bugzilla-Who: acoplan at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: acoplan at gcc dot gnu.org X-Bugzilla-Target-Milestone: 14.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113114 --- Comment #6 from Alex Coplan --- Hmm, it's worth noting that the ILP32 case is a bit different, though, in t= hat we have: (rr) call debug (insn->rtl ()) (insn 16 21 19 3 (parallel [ (set (reg:DF 62 v30) (unspec:DF [ (mem:V2x8QI (reg/v/f:DI 0 x0 [orig:123 a ] [123]) [= 0 +0 S16 A64]) ] UNSPEC_LDP_FST)) (set (reg:DF 63 v31) (unspec:DF [ (mem:V2x8QI (reg/v/f:DI 0 x0 [orig:123 a ] [123]) [= 0 +0 S16 A64]) ] UNSPEC_LDP_SND)) ]) 88 {*load_pair_8} (nil)) (rr) call debug (trailing_add->rtl ()) (insn 20 18 41 3 (set (reg:SI 0 x0 [orig:118 ivtmp.22 ] [118]) (plus:SI (reg:SI 0 x0 [orig:123 a ] [123]) (const_int 8 [0x8]))) 119 {*addsi3_aarch64} (nil)) i.e. x0 appears as DImode in the load pair addresses but the trailing updat= e is done in SImode, which means we end up not matching when forming the final pattern. I don't think either case is particularly interesting, so I'm leaning towar= ds just bailing out if recog fails in the pass (in which case both of these ju= st become missed-optimizations).=