From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 0801E3858C54; Sun, 31 Dec 2023 02:08:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0801E3858C54 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1703988496; bh=EBVQEcjOREVu4cR4pSwydoo00KARkNK4msoPhsuKPAA=; h=From:To:Subject:Date:From; b=SKriTNQ3ketbdFLxom49Rlpmtp4RHFNnKGZUTKBtYMZ+yvy7kpW5DhZ5Oi8aV5hFY UJbrNv/ILc1sCPsKhealCajn2kwUE2Xy/PA9GfGLQusJH1UrkbJuL6NwQGU4YmvIqu Ni0X21IeLjSy6EYbzR72SR+76TtODEeEJ8ECo4O4= From: "syq at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/113185] New: bad performance on big-endian&64bit port for struct 16 16 Date: Sun, 31 Dec 2023 02:08:10 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: unknown X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: syq at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter target_milestone Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113185 Bug ID: 113185 Summary: bad performance on big-endian&64bit port for struct 16 16 Product: gcc Version: unknown Status: UNCONFIRMED Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: syq at gcc dot gnu.org Target Milestone: --- ``` struct xx { int a:16; int b:16; }; struct xx xx (struct xx a, long long b) { a.b =3D b; return a; } ``` On little-endian&64, only 1 or 2 instructions are used, such as on AARCH64el: ``` bfi w0, w1, 16, 16 ret ``` On MIPS64el ``` move $2,$4 sll $5,$5,0 jr $31 ins $2,$5,16,16 ``` While for 64EB ``` .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] strh w1, [sp, 10] ldr w0, [sp, 8] add sp, sp, 16 .cfi_def_cfa_offset 0 lsl x0, x0, 32 ret .cfi_endproc ``` ``` daddiu $sp,$sp,-16 sd $4,0($sp) sh $5,2($sp) lw $2,0($sp) daddiu $sp,$sp,16 jr $31 dsll $2,$2,32 ```=