From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 9BDCD3858435; Sun, 7 Jan 2024 17:43:20 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9BDCD3858435 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1704649400; bh=Z9nT6Pjc09lJG9Oc5EEGEunON2b35DXnx8FnHPHUoYw=; h=From:To:Subject:Date:In-Reply-To:References:From; b=TJSAn/sEcluW4wI/rwEdEPh293b1a7UAnMXwriOVVCCcW91iwUqzpwuBgVBFtkm7k fzQrVrIdH3lVAtaL00kETOwY1MDxMUENpLeoLgg5KiYXw1pOajtx1ivCCJcE1eXM6L jRgqXK9Wc3cnB+nwM3ek/UByv/FMWPan9Opg5eyQ= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/113231] x86_64 uses SSE instructions for `*mem <<= const` at -Os Date: Sun, 07 Jan 2024 17:43:19 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: roger at nextmovesoftware dot com X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113231 --- Comment #5 from GCC Commits --- The master branch has been updated by Roger Sayle : https://gcc.gnu.org/g:0a8aba760f62e9d66cc5610ecc276c1f0befc651 commit r14-6985-g0a8aba760f62e9d66cc5610ecc276c1f0befc651 Author: Roger Sayle Date: Sun Jan 7 17:42:00 2024 +0000 i386: PR target/113231: Improved costs in Scalar-To-Vector (STV) pass. This patch improves the cost/gain calculation used during the i386 backend's SImode/DImode scalar-to-vector (STV) conversion pass. The current code handles loads and stores, but doesn't consider that converting other scalar operations with a memory destination, requires an explicit load before and an explicit store after the vector equivalent. To ease the review, the significant change looks like: /* For operations on memory operands, include the overhead of explicit load and store instructions. */ if (MEM_P (dst)) igain +=3D !optimize_insn_for_size_p () ? -COSTS_N_BYTES (8); : (m * (ix86_cost->int_load[2] + ix86_cost->int_store[2]) - (ix86_cost->sse_load[sse_cost_idx] + ix86_cost->sse_store[sse_cost_idx])); however the patch itself is complicated by a change in indentation which leads to a number of lines with only whitespace changes. For architectures where integer load/store costs are the same as vector load/store costs, there should be no change without -Os/-Oz. 2024-01-07 Roger Sayle Uros Bizjak gcc/ChangeLog PR target/113231 * config/i386/i386-features.cc (compute_convert_gain): Include the overhead of explicit load and store (movd) instructions when converting non-store scalar operations with memory destinations. Various indentation whitespace fixes. gcc/testsuite/ChangeLog PR target/113231 * gcc.target/i386/pr113231.c: New test case.=