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From: "denis.campredon at gmail dot com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/113231] New: x86_64 use MMX instructions for simple shift operations Date: Thu, 04 Jan 2024 09:07:38 +0000 [thread overview] Message-ID: <bug-113231-4@http.gcc.gnu.org/bugzilla/> (raw) https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113231 Bug ID: 113231 Summary: x86_64 use MMX instructions for simple shift operations Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: denis.campredon at gmail dot com Target Milestone: --- Compiled with -Os, the following functions use MMX instructions for simple shift. ------------------ void foo(int *i) { *i *=2; } void bar(int *i) { *i <<=2; } void baz(int *i) { *i >>=2; } ------------------ foo(int*): movd xmm0, DWORD PTR [rdi] pslld xmm0, 1 movd DWORD PTR [rdi], xmm0 ret bar(int*): movd xmm0, DWORD PTR [rdi] pslld xmm0, 2 movd DWORD PTR [rdi], xmm0 ret baz(int*): movd xmm0, DWORD PTR [rdi] psrad xmm0, 2 movd DWORD PTR [rdi], xmm0 ret ----------------- I would expect the generated code to use "sar" or "sal" instructions like O2 uses. The functions used to generate optimal code with version 9.5.
next reply other threads:[~2024-01-04 9:07 UTC|newest] Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-01-04 9:07 denis.campredon at gmail dot com [this message] 2024-01-04 9:13 ` [Bug target/113231] " pinskia at gcc dot gnu.org 2024-01-04 9:22 ` [Bug target/113231] x86_64 uses SSE instructions for `*mem <<= const` at -Os pinskia at gcc dot gnu.org 2024-01-04 12:45 ` ubizjak at gmail dot com 2024-01-04 16:25 ` roger at nextmovesoftware dot com 2024-01-07 17:43 ` cvs-commit at gcc dot gnu.org 2024-01-09 8:57 ` roger at nextmovesoftware dot com
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