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From: "juzhe.zhong at rivai dot ai" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/113247] RISC-V: Performance bug in SHA256 after enabling RVV vectorization Date: Wed, 10 Jan 2024 10:00:40 +0000 [thread overview] Message-ID: <bug-113247-4-VBYOg11FDy@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-113247-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113247 --- Comment #7 from JuzheZhong <juzhe.zhong at rivai dot ai> --- Hi, Robin. I sent a patch switching cost model into generic cost model: https://gcc.gnu.org/pipermail/gcc-patches/2024-January/642428.html But I tweak the cost back to default cost. Since current generic cost model has inferior codegen in dynamic-lmul2-7.c, I think we should switch it first, then we can together tune the cost model together so that we don't block our work.
next prev parent reply other threads:[~2024-01-10 10:00 UTC|newest] Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-01-06 0:02 [Bug c/113247] New: RISC-V: Performance bug in SHA256 juzhe.zhong at rivai dot ai 2024-01-09 14:47 ` [Bug target/113247] RISC-V: Performance bug in SHA256 after enabling RVV vectorization rdapp at gcc dot gnu.org 2024-01-09 14:53 ` juzhe.zhong at rivai dot ai 2024-01-09 15:02 ` rdapp at gcc dot gnu.org 2024-01-09 15:15 ` rdapp at gcc dot gnu.org 2024-01-10 0:54 ` juzhe.zhong at rivai dot ai 2024-01-10 6:29 ` juzhe.zhong at rivai dot ai 2024-01-10 10:00 ` juzhe.zhong at rivai dot ai [this message] 2024-01-10 12:35 ` pan2.li at intel dot com 2024-01-10 13:41 ` rdapp at gcc dot gnu.org 2024-01-11 1:37 ` pan2.li at intel dot com 2024-01-15 13:15 ` cvs-commit at gcc dot gnu.org 2024-01-15 13:24 ` juzhe.zhong at rivai dot ai
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