From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 3C1983858C39; Tue, 9 Jan 2024 11:00:16 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3C1983858C39 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1704798017; bh=nwlDgzFezrHuQkBVFEtIBylGkpwafZRMpAZIpQDHbu8=; h=From:To:Subject:Date:In-Reply-To:References:From; b=jBAw7q/ah+J3pxcUnrNrEUKDtDI/Bi1NXUB57WEISZLN4YJFjFKJeqe+yKpkpPhb9 srsmuHluqe1cRpp01APiac5NaQYqhOEkZBkndmfJGvJ11DYnUuDtY5osdwETcTYEOc B1XLjmOmHxV/6wNDKS3szvtetxawv1NvLgTZTF6M= From: "segher at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/113280] Strange error for empty inline assembly with +X constraint Date: Tue, 09 Jan 2024 11:00:13 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: diagnostic, inline-asm, rejects-valid X-Bugzilla-Severity: normal X-Bugzilla-Who: segher at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113280 --- Comment #9 from Segher Boessenkool --- (In reply to Alexander Monakov from comment #6) > From the context given in the gcc-help thread, the goal is to place an > optimization barrier in a sequence of floating-point calculation. "+r" is > inappropriate for floats, as it usually incurs a reload from a > floating-point register to a GPR and back, and there's no universal > constraint for FP regs (e.g. on amd64 it is "+x" for SSE registers, but "= +t" > for long double (or x87 FPU on 32-bit x86)). Yup. "Some target-specific register constraint" :-)=