From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id D933438582A8; Tue, 9 Jan 2024 09:00:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D933438582A8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1704790857; bh=C4cds6O65MDl4gP6XSd/SeF44ngkc/si2Ofb1T3qYI0=; h=From:To:Subject:Date:In-Reply-To:References:From; b=aS6Htd39Ic/aB8w66jP2TCZRb2+riukr3R9wB6r2JmU6ynnaVwB71s4c+FIuI9vR4 ubcWgixapy3cQIOTsq5+i6XAJceTd+HZgfNoo5AposwgyDtHlB93SqHlYMO47Km4Hn LmF2AHL6hPZSpTjhw2p5yiUhMH3QW9St6gA2fk6Y= From: "amonakov at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/113280] Strange error for empty inline assembly with +X constraint Date: Tue, 09 Jan 2024 09:00:53 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: diagnostic, inline-asm, rejects-valid X-Bugzilla-Severity: normal X-Bugzilla-Who: amonakov at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113280 Alexander Monakov changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |amonakov at gcc dot gnu.org --- Comment #6 from Alexander Monakov --- >From the context given in the gcc-help thread, the goal is to place an optimization barrier in a sequence of floating-point calculation. "+r" is inappropriate for floats, as it usually incurs a reload from a floating-poi= nt register to a GPR and back, and there's no universal constraint for FP regs (e.g. on amd64 it is "+x" for SSE registers, but "+t" for long double (or x= 87 FPU on 32-bit x86)).=