From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id D4B953858C42; Tue, 9 Jan 2024 02:06:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D4B953858C42 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1704765994; bh=qmKuX16w9NOvM4hv9fEwzRrw6J+hqpYJK7ginDvUFUQ=; h=From:To:Subject:Date:In-Reply-To:References:From; b=Uf34aP+q1U6U6O2SDDpc/3VaOgKyAsH0jzFJK81VZ1D3HF/bbO5cGbNBCIXa2sguC yI9GYzaI1QdniJzuyHFXj1/k7ikJLehfdNSl5hXRcn7uVIVnQjs0Nhl0hG16jlrtxf Z11xCbDqiR9bRxNlJdQA2y1xNydR0YstdDahZ7eA= From: "juzhe.zhong at rivai dot ai" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/113281] [14] RISC-V rv64gcv_zvl256b vector: Runtime mismatch with rv64gc Date: Tue, 09 Jan 2024 02:06:34 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: juzhe.zhong at rivai dot ai X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113281 --- Comment #4 from JuzheZhong --- Confirm reduced case: #include unsigned char a; int main() { short b =3D a =3D 0; for (; a !=3D 19; a++) if (a) b =3D 32872 >> a; assert (b =3D=3D 0); } with -fno-vect-cost-model -march=3Drv64gcv -O3: https://godbolt.org/z/joGb3e9Eb Also run failed assertion "b =3D=3D 0" failed: file "bug.c", line 10, funct= ion: main I suspect ARM SVE has the same fail. Hi, Andrew. Could you test this case on ARM to see whether ARM has same iss= ue as RISC-V for me ?=