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From: "vineetg at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/113429] New: RISC-V: SPEC2017 527 cam4 miscompilation in
 autovec VLA build
Date: Tue, 16 Jan 2024 20:37:51 +0000
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X-Bugzilla-Version: 14.0
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113429

            Bug ID: 113429
           Summary: RISC-V: SPEC2017 527 cam4 miscompilation in autovec
                    VLA build
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: vineetg at gcc dot gnu.org
                CC: juzhe.zhong at rivai dot ai, kito.cheng at gmail dot co=
m,
                    law at gcc dot gnu.org, rdapp at gcc dot gnu.org
  Target Milestone: ---

cam4 gets a runtime segv early on due to VSETVLI clobbering a reg (issue
obviously goes away with simple-vsetvl)

00000000002abc76 <__zm_conv_MOD_closure.constprop.0.isra.0>:
...
...
  2acebe:       mv      s2,a5
  2acec0:       sll     a4,s2,0x3
  2acec4:       li      a3,32
  2acec8:       add     a5,sp,224                       <--- a5 is some add=
ress
on stack
  2aceca:       bgeu    a4,a3,2ad2b6
  2acece:       li      a3,16
  2aced0:       bgeu    a4,a3,2ad294
...
...
  2ad294:       vsetvli a5,s2,e8,mf4,ta,ma              <--- BUG here as a5
clobbered
  2ad298:       vsetivli        zero,8,e8,mf2,ta,ma
  2ad29c:       add     a3,a5,8
  2ad2a0:       vmv.v.i v1,0
  2ad2a4:       vse8.v  v1,(a5)                         <--- SEGV
  2ad2a8:       vse8.v  v1,(a3)
  2ad2ac:       add     a4,a4,-16
  2ad2ae:       li      a3,8
  2ad2b0:       bltu    a4,a3,2aceda
  2ad2b4:       j       2ad282
  2ad2b6:       vsetivli        zero,8,e8,mf2,ta,ma
  2ad2ba:       add     a3,a5,8
  2ad2be:       vmv.v.i v1,0
  2ad2c2:       vse8.v  v1,(a5)
  2ad2c6:       vse8.v  v1,(a3)
  2ad2ca:       add     a3,a5,16
  2ad2ce:       vse8.v  v1,(a3)
  2ad2d2:       add     a3,a5,24
  2ad2d6:       vse8.v  v1,(a3)
  2ad2da:       add     a4,a4,-32
  2ad2dc:       li      a3,16
  2ad2de:       bltu    a4,a3,2aced4
  2ad2e2:       j       2ad294
<__zm_conv_MOD_closure.constprop.0.isra.0+0x161e>=