[Bug tree-optimization/113552] [11/12/13 Regression] vectorizer generates calls to vector math routines with 1 simd lane.

["cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113552

--- Comment #14 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Tamar Christina
<tnfchris@gcc.gnu.org>:

https://gcc.gnu.org/g:0c2fcf3ddfe93d1f403962c4bacbb5d55ab7d19d

commit r11-11323-g0c2fcf3ddfe93d1f403962c4bacbb5d55ab7d19d
Author: Tamar Christina <tamar.christina@arm.com>
Date:   Mon Apr 15 12:32:24 2024 +0100

    [AArch64]: Do not allow SIMD clones with simdlen 1 [PR113552]

    This is a backport of g:306713c953d509720dc394c43c0890548bb0ae07.

    The AArch64 vector PCS does not allow simd calls with simdlen 1,
    however due to a bug we currently do allow it for num == 0.

    This causes us to emit a symbol that doesn't exist and we fail to link.

    gcc/ChangeLog:

            PR tree-optimization/113552
            * config/aarch64/aarch64.c
            (aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1.

    gcc/testsuite/ChangeLog:

            PR tree-optimization/113552
            * gcc.target/aarch64/pr113552.c: New test.
            * gcc.target/aarch64/simd_pcs_attribute-3.c: Remove bogus check.