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From: "wilco at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/113618] [14 Regression] AArch64: memmove idiom
 regression
Date: Wed, 31 Jan 2024 16:58:01 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113618

Wilco <wilco at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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           Assignee|unassigned at gcc dot gnu.org      |wilco at gcc dot gn=
u.org

--- Comment #4 from Wilco <wilco at gcc dot gnu.org> ---
(In reply to Alex Coplan from comment #1)
> Confirmed.
>=20
> (In reply to Wilco from comment #0)
> > A possible fix would be to avoid emitting LDP/STP in memcpy/memmove/mem=
set
> > expansions.
>=20
> Yeah, so I had posted
> https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636855.html for t=
hat
> but held off from committing it at the time as IMO there wasn't enough
> evidence to show that this helps in general (and the pass could in theory
> miss opportunities which would lead to regressions).=20
>=20
> But perhaps this is a good argument for going ahead with that change (of
> course it will need rebasing).

Yes I have a patch based on current trunk + my outstanding memset cleanup
patch. It's slightly faster but causes a small codesize regression. This
appears mostly due to GCC being overly aggressive in changing loads/stores =
with
a zero offset into indexing, a non-zero offset or a lo_sym. This not only
blocks LDP opportunities but also increases register pressure and spilling.=