From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id D546F3858C35; Fri, 9 Feb 2024 04:21:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D546F3858C35 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1707452499; bh=Zzw/YUvhAKo4Hy+groG9o4m/6GKjR6s3kwist3seioQ=; h=From:To:Subject:Date:In-Reply-To:References:From; b=lf47/q3UkI2NDdWy/rpr3CPKTE7vbhRwsvVHE4dEeAXhPG5fz+Izt3Kp1+hR2rqEp ggQqJvU9mWkDOLW7mBf7A4mzTTKOrJc36OTxHsFUVH4GjlrbSwWP/zoLxIcWbg+wXV FGK1QUMgsEMt1B0QYH7aF/WfJ4c3WwjbS0Nk3XbU= From: "bergner at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/113652] [14 regression] Failed bootstrap on ppc unrecognized opcode: `lfiwzx' with -mcpu=7450 Date: Fri, 09 Feb 2024 04:21:38 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: assemble-failure, build X-Bugzilla-Severity: normal X-Bugzilla-Who: bergner at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 14.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D113652 Peter Bergner changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |meissner at gcc dot gnu.org --- Comment #15 from Peter Bergner --- (In reply to Kewen Lin from comment #11) > In gcc, lfiwzx is guarded with TARGET_LFIWZX =3D> TARGET_POPCNTD (ISA2.06= ), > while -mvsx will guarantee TARGET_POPCNTD (ISA_2_6_MASKS_SERVER) set, so = it > considers lfiwzx is supported. IMHO the underlying philosophy is that hav= ing > the capability of vsx the supported ISA level is at least 2.06, lfiwzx is > supported from 2.06, so it's supported. >=20 > But binutils seems not to follow it: > {"xvadddp", XX3(60,96), XX3_MASK, PPCVSX, PPCVLE,=20=20=20= =20=20=20=20=20 > {XT6, XA6, XB6}}, > {"lfiwzx", X(31,887), X_MASK, POWER7|PPCA2, 0,=20=20=20=20=20= =20=20=20=20=20=20=20=20 > {FRT, RA0, RB}}, > Both are guarded with different masks and apparently PPCVSX doesn't enable > POWER7. That's because xvadddp is a VSX instruction (ie, mentioned in the VSX secti= on of the ISA), while lfiwzx is a floating point instruction and part of the b= ase ISA (for Power7 and above). To me, that means the -mvsx assembler option is correct to not enable lfiwzx. ...and as Alan mentioned, even changing the assembler to have -mvsx enable lfiwzx isn't a solution, since old already released assemblers would still be broken. The problem seems to be that the GCC option -mvsx enables some base (ie, non-vsx) instructions not included in the 7450 which seems dangerous to me.= If the vsx support in the compiler really needs those base power7 instructions= to function correctly, then we should be emitting an error when the user does -mcpu=3DCPU -mvsx and CPU is something less the power7. If the vsx support doesn't really need those base power7 instructions to operate, then we shouldn't be enabling them.=20=20=20 Mike, can you confirm whether our -mvsx VSX support requires those base pow= er7 instructions or not?=