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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/113711] APX instruction set and instructions longer than 15 bytes (assembly warning)
Date: Thu, 08 Feb 2024 11:53:47 +0000	[thread overview]
Message-ID: <bug-113711-4-h6EkuJm6Zp@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-113711-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113711

--- Comment #10 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by H.J. Lu <hjl@gcc.gnu.org>:

https://gcc.gnu.org/g:d2798598c4fcf2281921df3c2b7b1d16a171fa03

commit r14-8883-gd2798598c4fcf2281921df3c2b7b1d16a171fa03
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Mon Feb 5 19:48:48 2024 -0800

    x86: Update constraints for APX NDD instructions

    1. The only supported TLS code sequence with ADD is

            addq foo@gottpoff(%rip),%reg

    Change je constraint to a memory operand in APX NDD ADD pattern with
    register source operand.

    2. The instruction length of APX NDD instructions with immediate operand:

    op imm, mem, reg

    may exceed the size limit of 15 byes when non-default address space,
    segment register or address size prefix are used.

    Add jM constraint which is a memory operand valid for APX NDD instructions
    with immediate operand and add jO constraint which is an offsetable memory
    operand valid for APX NDD instructions with immediate operand.  Update
    APX NDD patterns with jM and jO constraints.

    gcc/

            PR target/113711
            PR target/113733
            * config/i386/constraints.md: List all constraints with j prefix.
            (j>): Change auto-dec to auto-inc in documentation.
            (je): Changed to a memory constraint with APX NDD TLS operand
            check.
            (jM): New memory constraint for APX NDD instructions.
            (jO): Likewise.
            * config/i386/i386-protos.h (x86_poff_operand_p): Removed.
            * config/i386/i386.cc (x86_poff_operand_p): Likewise.
            * config/i386/i386.md (*add<dwi>3_doubleword): Use rjO.
            (*add<mode>_1[SWI48]): Use je and jM.
            (addsi_1_zext): Use jM.
            (*addv<dwi>4_doubleword_1[DWI]): Likewise.
            (*sub<mode>_1[SWI]): Use jM.
            (@add<mode>3_cc_overflow_1[SWI]): Likewise.
            (*add<dwi>3_doubleword_cc_overflow_1): Use rjO.
            (*and<dwi>3_doubleword): Likewise.
            (*anddi_1): Use jM.
            (*andsi_1_zext): Likewise.
            (*and<mode>_1[SWI24]): Likewise.
            (*<code><dwi>3_doubleword[any_or]): Use rjO
            (*code<mode>_1[any_or SWI248]): Use jM.
            (*<code>si_1_zext[zero_extend + any_or]): Likewise.
            * config/i386/predicates.md (apx_ndd_memory_operand): New.
            (apx_ndd_add_memory_operand): Likewise.

    gcc/testsuite/

            PR target/113711
            PR target/113733
            * gcc.target/i386/apx-ndd-2.c: New test.
            * gcc.target/i386/apx-ndd-base-index-1.c: Likewise.
            * gcc.target/i386/apx-ndd-no-seg-global-1.c: Likewise.
            * gcc.target/i386/apx-ndd-seg-1.c: Likewise.
            * gcc.target/i386/apx-ndd-seg-2.c: Likewise.
            * gcc.target/i386/apx-ndd-seg-3.c: Likewise.
            * gcc.target/i386/apx-ndd-seg-4.c: Likewise.
            * gcc.target/i386/apx-ndd-seg-5.c: Likewise.
            * gcc.target/i386/apx-ndd-tls-1a.c: Likewise.
            * gcc.target/i386/apx-ndd-tls-2.c: Likewise.
            * gcc.target/i386/apx-ndd-tls-3.c: Likewise.
            * gcc.target/i386/apx-ndd-tls-4.c: Likewise.
            * gcc.target/i386/apx-ndd-x32-1.c: Likewise.

  parent reply	other threads:[~2024-02-08 11:53 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-01 23:40 [Bug target/113711] New: Warning: instruction length of 16 bytes exceeds the limit of 15 hjl.tools at gmail dot com
2024-02-01 23:45 ` [Bug target/113711] " hjl.tools at gmail dot com
2024-02-01 23:56 ` [Bug target/113711] Warning: instruction length of 16 bytes exceeds the limit of 15 due to -mapxf and APX instruction set rejecting more than 15 bytes pinskia at gcc dot gnu.org
2024-02-02 12:35 ` [Bug target/113711] APX instruction set and instructions longer than 15 bytes (assembly warning) hjl.tools at gmail dot com
2024-02-02 14:45 ` hjl.tools at gmail dot com
2024-02-02 18:50 ` hongyuw at gcc dot gnu.org
2024-02-02 19:31 ` hjl.tools at gmail dot com
2024-02-02 20:03 ` hongyuw at gcc dot gnu.org
2024-02-02 20:58 ` hjl.tools at gmail dot com
2024-02-02 21:01 ` hjl.tools at gmail dot com
2024-02-03 15:38 ` hjl.tools at gmail dot com
2024-02-08 11:53 ` cvs-commit at gcc dot gnu.org [this message]
2024-02-20  7:43 ` cvs-commit at gcc dot gnu.org

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