[Bug target/113764] [X86] Generates lzcnt when bsr is sufficient

["jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113764

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |jakub at gcc dot gnu.org

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
It is far more complicated than this.
When TARGET_LZCNT is on, CLZ_DEFINED_VALUE_AT_ZERO is 2 and already in GIMPLE
opts can use the fact that it has particular behavior on zero argument.
Before my _BitInt changes for clz/ctz etc., there was no way to differentiate
it in GIMPLE except for builtin (which had UB at zero) vs. ifn (which had it
depending on C?Z_DEFINED_VALUE_AT_ZERO).  Now even ifn can be UB at zero
(single argument) or well defined (two).  But still on RTL we have just one
thing, CLZ or CTZ rtxes which honor
C?Z_DEFINED_VALUE_AT_ZERO for the particular mode.
So, I think having at least in one function some lzcnt and some bsr insns
wouldn't be possible.