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From: "gjl at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug other/113927] New: [avr-tiny] Sets up a stack-frame even for trivial code
Date: Thu, 15 Feb 2024 09:43:05 +0000	[thread overview]
Message-ID: <bug-113927-4@http.gcc.gnu.org/bugzilla/> (raw)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113927

            Bug ID: 113927
           Summary: [avr-tiny] Sets up a stack-frame even for trivial code
           Product: gcc
           Version: 13.2.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: other
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gjl at gcc dot gnu.org
  Target Milestone: ---

Code like

char func (char c)
{
    return c;
}

compiles as expected to

func:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
/* epilogue start */
        ret

with  avr-gcc -S -Os -mmcu=attiny26 -da , but for attiny40 (Reduced Tiny with
16 GPRs only) the result is:

func:
        push r28
        push r29
        push __tmp_reg__
        in r28,__SP_L__
        in r29,__SP_H__
/* prologue: function */
/* frame size = 1 */
/* stack size = 3 */
.L__stack_usage = 3
/* epilogue start */
        pop __tmp_reg__
        pop r29
        pop r28
        ret

In .asmcons, i.e. just prior to register allocation, the code reads:

(insn 13 4 2 2 (set (reg:QI 46)
        (reg:QI 24 r24 [ c ])) "main.c":2:1 86 {movqi_insn_split}
     (expr_list:REG_DEAD (reg:QI 24 r24 [ c ])
        (nil)))
(insn 2 13 3 2 (set (reg/v:QI 44 [ c ])
        (reg:QI 46)) "main.c":2:1 86 {movqi_insn_split}
     (expr_list:REG_DEAD (reg:QI 46)
        (nil)))
(note 3 2 10 2 NOTE_INSN_FUNCTION_BEG)
(insn 10 3 11 2 (set (reg/i:QI 24 r24)
        (reg/v:QI 44 [ c ])) "main.c":4:1 86 {movqi_insn_split}
     (expr_list:REG_DEAD (reg/v:QI 44 [ c ])
        (nil)))
(insn 11 10 0 2 (use (reg/i:QI 24 r24)) "main.c":4:1 -1
     (nil))

so everything is fine and this PR is not a dup of PR110093.  According to
Vladimir Makarov, PR110093 is because DFA cannot handle subregs, but the RTL
code above does not have subregs.  What's the case is that IRA has very high
register costs, for example in .ira:

Pass 0 for finding pseudo/allocno costs

    a1 (r46,l0) best NO_REGS, allocno NO_REGS
    a0 (r44,l0) best NO_REGS, allocno NO_REGS

  a0(r44,l0) costs: POINTER_X_REGS:65535000 POINTER_Y_REGS:65535000
POINTER_Z_REGS:65535000 BASE_POINTER_REGS:65535000 POINTER_REGS:65535000
SIMPLE_LD_REGS:65535000 GENERAL_REGS:65535000 MEM:3000

whereas the .ira for attiny26 (ordinary core with 32 GPRs):

Pass 0 for finding pseudo/allocno costs

    a0 (r46,l0) best GENERAL_REGS, allocno GENERAL_REGS

  a0(r46,l0) costs: POINTER_X_REGS:4000 POINTER_Y_REGS:4000 POINTER_Z_REGS:4000
BASE_POINTER_REGS:4000 POINTER_REGS:4000 ADDW_REGS:4000 SIMPLE_LD_REGS:4000
LD_REGS:4000 NO_LD_REGS:4000 GENERAL_REGS:4000 MEM:4000

../../source/gcc-master/configure --target=avr --disable-nls --with-dwarf2
--with-gnu-as --with-gnu-ld --disable-shared --enable-languages=c,c++

             reply	other threads:[~2024-02-15  9:43 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-15  9:43 gjl at gcc dot gnu.org [this message]
2024-02-15 12:47 ` [Bug other/113927] " pinskia at gcc dot gnu.org
2024-02-15 13:09 ` cvs-commit at gcc dot gnu.org
2024-02-15 13:49 ` cvs-commit at gcc dot gnu.org
2024-02-15 13:50 ` [Bug target/113927] " gjl at gcc dot gnu.org

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