From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 0360C3858C53; Thu, 29 Feb 2024 11:43:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0360C3858C53 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1709207004; bh=oHfHlbPa0q/wfNroBC+EBWxurUCO+ZIrRdin2vfLrDw=; h=From:To:Subject:Date:From; b=BQaUM61g6kZIYTfb+5K3hSBeQF6XqHEGuSpsrKI2csOPR+G+iLOiypeEblLZPNBVK eyuUPDnDUEI4SObCtBpEcPJctUIb0JGY+Ml6o5uxQ00Pn8Kz7WPRKm6EYsJV+/lgar SbTjaed9lWcUxsEkvH2jJdFrfQyClR9HikSXyclU= From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/114166] New: word_mode vectorization still relies on vector lowering Date: Thu, 29 Feb 2024 11:43:23 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: tree-optimization X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter target_milestone Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114166 Bug ID: 114166 Summary: word_mode vectorization still relies on vector lowering Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: rguenth at gcc dot gnu.org Target Milestone: --- When the vectorizer decides to use emulated vectors for operations the targ= et doesn't support and the vector types do not have integer mode but the vectorizer simply emits vector code nevertheless which it does for bitwise operations, we fail RTL expansion. This can be seen with g++.dg/opt/pr82929.C when moving vector lowering before vectorization. We then vectorize V1SImode bitwise and even though the optab check discovered that's not supported. Vectorizer code generation should, like it now does for PLUS/MINUS and NEGA= TE, use integer types when code generating emulated vectors.=