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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114173] miss optimization of redundant load operation, may confused by type conversion
Date: Thu, 29 Feb 2024 22:44:06 +0000 [thread overview]
Message-ID: <bug-114173-4-p5WnE9DsxX@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-114173-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114173
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Trying 7, 8, 9 -> 10:
7: r100:HI=zero_extend([const(`g_63'+0x10)])
8: {r107:HI=r100:HI+0x1;clobber flags:CC;}
REG_UNUSED flags:CC
9: r108:SI=zero_extend(r107:HI)
REG_DEAD r107:HI
10: {r109:SI=r108:SI-0x1;clobber flags:CC;}
REG_DEAD r108:SI
REG_UNUSED flags:CC
Failed to match this instruction:
(parallel [
(set (reg:SI 109 [ c_8 ])
(zero_extend:SI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI
("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>)
(const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1
A128])))
(clobber (reg:CC 17 flags))
(set (reg:HI 100 [ _3 ])
(zero_extend:HI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI
("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>)
(const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1
A128])))
])
Failed to match this instruction:
(parallel [
(set (reg:SI 109 [ c_8 ])
(zero_extend:SI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI
("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>)
(const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1
A128])))
(set (reg:HI 100 [ _3 ])
(zero_extend:HI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI
("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>)
(const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1
A128])))
])
Successfully matched this instruction:
(set (reg:HI 100 [ _3 ])
(zero_extend:HI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [flags
0x2] <var_decl 0x7f3809c10cf0 g_63>)
(const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128])))
Successfully matched this instruction:
(set (reg:SI 109 [ c_8 ])
(zero_extend:SI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [flags
0x2] <var_decl 0x7f3809c10cf0 g_63>)
(const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128])))
allowing combination of insns 7, 8, 9 and 10
original costs 9 + 4 + 4 + 4 = 21
replacement costs 9 + 9 = 18
deferring deletion of insn with uid = 8.
deferring deletion of insn with uid = 7.
modifying insn i2 9: r100:HI=zero_extend([const(`g_63'+0x10)])
deferring rescan insn with uid = 9.
modifying insn i3 10: r109:SI=zero_extend([const(`g_63'+0x10)])
deferring rescan insn with uid = 10.
prev parent reply other threads:[~2024-02-29 22:44 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-29 16:27 [Bug rtl-optimization/114173] New: " absoler at smail dot nju.edu.cn
2024-02-29 22:44 ` pinskia at gcc dot gnu.org [this message]
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