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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114173] miss optimization of redundant load operation,
 may confused by type conversion
Date: Thu, 29 Feb 2024 22:44:06 +0000
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X-Bugzilla-Keywords: missed-optimization
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114173

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Trying 7, 8, 9 -> 10:
    7: r100:HI=3Dzero_extend([const(`g_63'+0x10)])
    8: {r107:HI=3Dr100:HI+0x1;clobber flags:CC;}
      REG_UNUSED flags:CC
    9: r108:SI=3Dzero_extend(r107:HI)
      REG_DEAD r107:HI
   10: {r109:SI=3Dr108:SI-0x1;clobber flags:CC;}
      REG_DEAD r108:SI
      REG_UNUSED flags:CC
Failed to match this instruction:
(parallel [
        (set (reg:SI 109 [ c_8 ])
            (zero_extend:SI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI
("g_63") [flags 0x2]  <var_decl 0x7f3809c10cf0 g_63>)
                            (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1
A128])))
        (clobber (reg:CC 17 flags))
        (set (reg:HI 100 [ _3 ])
            (zero_extend:HI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI
("g_63") [flags 0x2]  <var_decl 0x7f3809c10cf0 g_63>)
                            (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1
A128])))
    ])
Failed to match this instruction:
(parallel [
        (set (reg:SI 109 [ c_8 ])
            (zero_extend:SI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI
("g_63") [flags 0x2]  <var_decl 0x7f3809c10cf0 g_63>)
                            (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1
A128])))
        (set (reg:HI 100 [ _3 ])
            (zero_extend:HI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI
("g_63") [flags 0x2]  <var_decl 0x7f3809c10cf0 g_63>)
                            (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1
A128])))
    ])
Successfully matched this instruction:
(set (reg:HI 100 [ _3 ])
    (zero_extend:HI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [f=
lags
0x2]  <var_decl 0x7f3809c10cf0 g_63>)
                    (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128])))
Successfully matched this instruction:
(set (reg:SI 109 [ c_8 ])
    (zero_extend:SI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [f=
lags
0x2]  <var_decl 0x7f3809c10cf0 g_63>)
                    (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128])))
allowing combination of insns 7, 8, 9 and 10
original costs 9 + 4 + 4 + 4 =3D 21
replacement costs 9 + 9 =3D 18
deferring deletion of insn with uid =3D 8.
deferring deletion of insn with uid =3D 7.
modifying insn i2     9: r100:HI=3Dzero_extend([const(`g_63'+0x10)])
deferring rescan insn with uid =3D 9.
modifying insn i3    10: r109:SI=3Dzero_extend([const(`g_63'+0x10)])
deferring rescan insn with uid =3D 10.=