[Bug target/114264] RISC-V: ICE in riscv-vector-costs.cc of gcc master branch

["cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114264

--- Comment #1 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Demin Han <deminhan@gcc.gnu.org>:

https://gcc.gnu.org/g:42187c6968af9907de1f9b7563d87de739857684

commit r14-9380-g42187c6968af9907de1f9b7563d87de739857684
Author: demin.han <demin.han@starfivetech.com>
Date:   Wed Mar 6 17:34:34 2024 +0800

    RISC-V: Fix ICE in riscv vector costs

    The following code can result in ICE:
    -march=rv64gcv --param riscv-autovec-lmul=dynamic -O3

    char *jpeg_difference7_input_buf;
    void jpeg_difference7(int *diff_buf) {
      unsigned width;
      int samp, Rb;
      while (--width) {
        Rb = samp = *jpeg_difference7_input_buf;
        *diff_buf++ = -(int)(samp + (long)Rb >> 1);
      }
    }

    One biggest_mode update missed in one branch and trigger assertion fail.
    gcc_assert (biggest_size >= mode_size);

    Tested On RV64 and no regression.

            PR target/114264

    gcc/ChangeLog:

            * config/riscv/riscv-vector-costs.cc: Fix ICE

    gcc/testsuite/ChangeLog:

            * gcc.dg/vect/costmodel/riscv/rvv/pr114264.c: New test.

    Signed-off-by: demin.han <demin.han@starfivetech.com>